• 한국전자통신학회논문지
• /
• 제16권2호
• /
• pp.233-240
• /
• 2021

다양한 함량으로 네오디뮴이 도핑된 황화아연 박막제작은 RF 마그네트론 스퍼터링 장비를 이용하여 황화아연과 네오디뮴을 동시 증착하여 박막을 제작하였고, 후처리 공정으로 급속열처리를 400℃ 에서 30분간 실시하였다. 다양한 네오디뮴의 도핑 함량(0.35at.%, 1.31at.%, 1.82at.% 및 1.90at.%)을 갖는 ZnS 박막의 구조, 형태, 광학적 특성을 연구하였다. X-선 회절 패턴은 모든 박막에서 (111)방향의 큐빅 구조로 성장하였다. SEM 이미지와 AFM 이미지를 통해 네오디뮴 도핑 함량에 의한 박막의 표면 및 구조적 형태에 대하여 설명하였다. EDAX를 통해 다른 불순물이 포함되지 않은 Zn, S 및 Nd의 원소만을 확인하였다. UV-vis 스펙트럼을 이용하여 제작된 박막의 투과율과 밴드갭을 확인하였다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 반도체 재료 센서 박막재료 전자세라믹스
• /
• pp.9-12
• /
• 2004

This paper investigated the stability of Ta-Mo alloy on thin gate dielectric. Ta-Mo alloy was deposited by using co-sputtering process after thermal growing of 3.4nm and 4.2nm silicon dioxide. When the sputtering power of Ta and Mo were 100W and 70W, respectively, the suitable work function for NMOS gate electrode, 4.2eV, could obtain. To prove interface thermal stability of thin film gate dielectric and Ta-Mo alloy, rapid thermal annealing was performed at $600^{\circ}C$ and $700^{\circ}C$ for 10sec in Ar ambient. The results of interface reaction were surveyed by change of silicon dioxide thickness and work function after annealing process. Also, the reliability of alloy gate and gate dielectric could be confirmed by quantity of leakage current. Ta-Mo alloy was showed low sheet resistance and thermal stability, namely, little change of gate dielectric and work function, after $700^{\circ}C$ annealing process.

• 한국진공학회지
• /
• 제6권1호
• /
• pp.28-35
• /
• 1997

급속열처리에 따른 (hfac)Cu(VTMS)구리원으로 증착한 구리 박막의 특성개선 효과 와 TiN층의 확산방지 특성의 변화를 고찰하였다. 구리 박막의 특성 변화는 열처리 시간보 다 열처리 온도의 변화에 더 민감하며, 후열처리에 의해 Cu/TiN구조의 전기적 특성과 더불 어 미세구조 변화가 뚜렷하게 나타났다. $400^{\circ}C$이상에서 면저항의 증가가 시작되어 $600^{\circ}C$이 상에서 구리와 TiN의 상호 반응과 구리박막 표면에서의 산화물 형성이 관찰되었다. 후열처 리에 의한 결정립 성장은 (111)배향을 나타내었고, $500^{\circ}C$에서 결정립의 성장이 가장 활발하 게 나타났다. MOCVD-Cu/PVD-TiN구조에서 TiN층의 확산방지 특성을 충분히 유지시키면 서 구리 박막의 전기적 특성을 개선시킬 수 있는 열처리 공정 온도는 $400^{\circ}C$정도가 적정한 것으로 판단되었다.

• 한국진공학회지
• /
• 제5권4호
• /
• pp.348-353
• /
• 1996

CdS/ITO/glass 기판위에 다결정 CdTe 박막을 진공증착법으로 제조한 후 급속열처리하여 열처리 온도와 가스분위기가 CdTe의 박막의 물성과 전지특성에 미치는 효과를 연구하였다. $450^{\circ}C$에서 $550^{\circ}C$까지 공기중 급속열처리한 경우 박막은 EDX 조성분석결과 화학양론비를 유지하였고 표면성분비는 Cd-rich 상태였으나 전처리후 저저항 contact 제조에 유리한 Te-rich 상태로 변화되었다. TEM과 micro-EDX 결과 급속열처리 전후 모두 CdTe는 주상정구조가 관찰되었고 열처리동안 CdTe내로 확산된 S의 양이 로열처리와 비교하여 매우 적음을 알 수 있었다. 급속열처리 온도가 가스분위기 조건 중 공기 중에서 $550^{\circ}C$ 열처리하였을 때 가장 우수한 태양전지효율을 나타내었다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2010년도 제39회 하계학술대회 초록집
• /
• pp.233-233
• /
• 2010

CdS thin films were deposited on glass substrates by R.F. magnetron sputtering method and some of the samples were treated by rapid thermal annealing (RTA) process. Effects of thermal annealing on structural and optical properties were investigated at different temperatures ranging from 100 to $600^{\circ}C$. The crystallographic structure of the films and the size of the crystallites in the films were studied by X-ray diffraction. The crystallite sizes were found to increase, and the X-ray diffraction patterns were seen to sharpen by annealing. Optical properties of the films were calculated using the envelope method and the photoluminescence measurements. The optical properties of the films were seen to be dependent on the film thicknesses. The energy gap of the films was found to decrease by annealing. The band edge sharpness of the optical absorption was seen to oscillate by thermal annealing. Annealing over $400^{\circ}C$ was seen to degrade the optical properties of the film. The best annealing temperature for the films was found to be $400^{\circ}C$ from the optical properties. It is observed that the CdS film annealed at $400^{\circ}C$ reveals the strongest UV emission intensity and narrowest full width at half maximum among the temperature ranges studied. The enhanced UV emission from the film annealed at $400^{\circ}C$ is attributed to the improved crystalline quality of CdS thin film due to the effective relaxation of residual compressive stress and achieving maximum grain size. The results show that heat treatments under optimal annealing condition can provide significant improvements in the properties of CdS thin films.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2009년도 제38회 동계학술대회 초록집
• /
• pp.140-140
• /
• 2010

Non-mass analyzed ion shower doping (ISD) technique with a bucket-type ion source or mass-analyzed ion implantation with a ribbon beam-type has been used for source/drain doping, for LDD (lightly-doped-drain) formation, and for channel doping in fabrication of low-temperature poly-Si thin-film transistors (LTPS-TFT's). We reported an abnormal activation behavior in boron doped poly-Si where reverse annealing, the loss of electrically active boron concentration, was found in the temperature ranges between $400^{\circ}C$ and $650^{\circ}C$ using isochronal furnace annealing. We also reported reverse annealing behavior of sequential lateral solidification (SLS) poly-Si using isothermal rapid thermal annealing (RTA). We report here the importance of implantation conditions on the dopant activation. Through-doping conditions with higher energies and doses were intentionally chosen to understand reverse annealing behavior. We observed that the implantation condition plays a critical role on dopant activation. We found a certain implantation condition with which the sheet resistance is not changed at all upon activation annealing.

• 한국전기전자재료학회논문지
• /
• 제17권1호
• /
• pp.7-15
• /
• 2004

The ferroelectric SBT thin films as a material of capacitors for non-volatile FRAMs have some problems that its remanent polarization value is relatively low and the crystallization temperature is quite high abovc 80$0^{\circ}C$. Therefore, in this paper, SBTN solution with S $r_{0.9}$B $i_{2.1}$T $a_{1.8}$N $b_{0.2}$$O_{9}$ composition was synthesized by sol-gel method. Sr(O $C_2$ $H_{5}$)$_2$, Bi(TMHD)$_3$, Ta(O $C_2$ $H_{5}$)$_{5}$and Nb(O $C_2$ $H_{5}$)$_{5}$ were used as precursors, which were dissolved in 2-methoxyethanol. SBTN thin films with 200 nm thickness were deposited on Pt/Ti $O_2$/ $SiO_2$/Si substrates by spin-coating. UV-irradiation in a power of 200 W for 10 min and rapid thermal annealing in a 5-Torr-oxygen ambient at 76$0^{\circ}C$ for 60 sec were used to promote crystallization. The films were well crystallized and fine-grained after annealing at $650^{\circ}C$ in oxygen ambient. The electrical characteristics of 2Pr=11.94 $\mu$C/$\textrm{cm}^2$, Ps＋/Pr＋=0.54 at the applied voltage of 5 V were obtained for a 200-nm-thick SBTN films. This results show that 2Pr values of the UV irradiated and rapid thermal annealed SBTN thin films at the applied voltage of 5 V were about 57% higher than those of no additional processed SBTN thin films. thin films.lms.s.s.

• 한국세라믹학회지
• /
• 제30권4호
• /
• pp.332-338
• /
• 1993

TiN/Ti is the best buffer layer between PZT thin film and si substrate among the Ti, TiN, ZrN, TiN/Ti, ZrN/Ti. The amorphous PZT films deposited on TiN/Ti buffer layer directly transform into perovskite phase when rapid thermal annealed for 30sec above 55$0^{\circ}C$. As Rapid Thermal Annealing(RTA) temperature increased, the remanent polarization(Pr) and dielectric constant($\varepsilon$r) increased and then showed Pr=21 $\varepsilon$r=593 when rapid thermal annealed 80$0^{\circ}C$ for 30sec. On the contrary the leakage current increased with increasing RTA temperature due to the formation of void made by Pb evaporationand grain cohesion.

• 제어로봇시스템학회:학술대회논문집
• /
• 제어로봇시스템학회 1995년도 Proceedings of the Korea Automation Control Conference, 10th (KACC); Seoul, Korea; 23-25 Oct. 1995
• /
• pp.79-82
• /
• 1995

The problem of temperature control for rapid thermal processing (RTP) in semiconductor manufacturing is discussed in this paper. Among sub=micron technologies for VLSI devices, reducing the junction depth of doped region is of great importance. This paper investigates existing methods for manufacturing wafers, focusing on the RPT which is considered to be good for formation of shallow junctions and performs the wafer fabrication operation in a single chamber of annealing, oxidation, chemical vapor deposition, etc., within a few minutes. In RTP for semiconductor manufacturing, accurate and uniform control of the wafer temperature is essential. In this paper, a robustr controller is designed using a recently developed optimization technique. The controller designed is then tested via computer simulation and compared with the other results.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제6권2호
• /
• pp.119-123
• /
• 2006

This work presents the fabrication and characteristics of $Bi_2O_3/Si$ heterojunction prepared by rapid thermal oxidation technique without any postdeposition annealing condition. The bismuth trioxide film was deposited onto monocrystalline Si and glass substrates by rapid thermal oxidation of bismuth film with aid of halogen lamp at $500^{\circ}C/\;45$ s in static air. The structural, optical and electrical properties of $Bi_2O_3$ film were investigated and compared with other published results. The structural investigation showed that the grown films are polycrystalline and multiphase (${\alpha}-Bi_2O_3$ and ${\beta}-Bi_2O_3$). Optical properties revealed that these films having direct optical band gap of 2.55 eV at 300 K with high transparency in visible and NIR regions. Dark and illuminated I-V, CV, and spectral responsivity of $Bi_2O_3/Si$ heterojunction were investigated and discussed.