• Journal of IKEEE
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• v.23 no.2
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• pp.710-715
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• 2019

We consider parameter estimation in distributed systems in which measurements at local nodes are quantized in a non-regular manner, where multiple codewords are mapped into a single local measurement. For the system with non-regular quantization, to ensure a perfect independent encoding at local nodes, a local measurement can be encoded into a set of a great number of codewords which are transmitted to a fusion node where estimation is conducted with enormous computational cost due to the large cardinality of the sets. In this paper, we propose an efficient estimation technique that can handle the non-regular quantized data by efficiently finding the feasible combination of codewords without searching all of the possible combinations. We conduct experiments to show that the proposed estimation performs well with respect to previous novel techniques with a reasonable complexity.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.1
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• pp.80-93
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• 1997

This paper proposes a new technique of optimal codebook design in multistage gain-shape vector quantization (MS-GS VQ) for wireless image communication. An original image is divided into a smany blocks as possible in order to get strong robustness to channel transmission errors: the original image is decomposed into a number of subband images, each of which contains a sperate spatial frequency information and is obtained by the biorthogonal wavlet transform; each subband is separated into several consecutive VQ stages, where each stage has a residual information of the previous stage; one vector in each stage is divided into two components-gain and shape. But, this decomposition genrates too many blocks and it thus makes the determination of optimal codebooks difficult. We overcome this difficulty by evolving each block's codebook independently with different genetic algorithm that uses each stage's individual training vectors. Th eimpact of th eproposed VQ technique on the channel transmission errors is compared with that of other VQ techniques. Simulation results show that the proposed VQ technique (MS-GS VQ) with the optimal codebook designe dy genetic algorithms is very robust to channel transmission errors even under the bursty and high BER conditions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.9
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• pp.2035-2042
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• 1997

We consider the design of soft decision functions for each stage of multistage detection for coherent demodulation in an asynchronous code-division multiple-access(CDMA) system. In particular, the sigmoid function, which is shown to be optimal under the mean square error(MSE) criterion, andmultilevel quantizers that best approximate the sigmoid function are derived. At each stage of multistage detection, the parameters of these decision functions are adjusted depending on estimated input statistics. Computer simulation results demonstrate that multistage detectors employing these soft decision functions perform considerably better than those with hard decision.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.9
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• pp.107-114
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• 2004

This paper presents block and timing diagrams of the DWA(Data Weighted Averaging) to optimize a feedback time delay of the sigma-delta modulator. Through the MATLAB modeling, the optimized coefficients of the integrators are obtained to design the modulator. The fully differential SC integrators, feedback DAC, 9-level quantizer, and DWA are designed by considering the nonideal characteristics of the modulator. The designed third-order multibit modulator is fabricated in a 0.35${\mu}{\textrm}{m}$ CMOS process. The modulator achieves 75dB signal-to-noise ratio and 74dB dynamic range at 1.2Vp-p 825kHz input signal and 52.8MHE sampling frequency.

• The KIPS Transactions:PartB
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• v.8B no.4
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• pp.343-350
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• 2001

백터 양자화기 설계는 다차원의 목적함수를 최소화하는 학습 알고리즘을 필요로 한다. 일반화된 Lloyd 방법(GLA)은 벡터 양자화기 설계를 위해 오늘날 가장 널리 사용되는 알고리즘이다. GLA 는 일괄처리(batch) 방식으로 코드북을 생성하며 목적함수를 단조 감소시키는 강하법(descent algorithm)의 일종이다. 한편 Kohonen 학습법(KLA)은 학습벡터가 입력되는 동안 코드북이 갱신되는 온라인 벡터 양자화기 설계 알고리즘 이다. KLA는 원래 신경망 학습을 위해 Kohonen에 의해 제안되었다. KLA 역시 GLA와 마찬가지로 강하법의 일종이라 할 수 있다. 따라서 이들 두 알고리즘은, 비록 사용하기 편리하고 안정적으로 동작을 하지만, 극소(local minimum) 점으로 수렴하는 문제를 안고 있다. 우리는 이 문제와 관련하여 simulated annealing(SA) 방법의 응용을 논하고자 한다. SA는 현재까지 극소에 빠지지 않고 최소(global minimum)로 수렴하면서, 해의 수렴이 (통계적으로) 보장되는 유일한 방법이라 할 수 있다. 우리는 먼저 GLA에 SA를 응용한 그 동안의 연구를 개괄한다. 다음으로 온라인 방식의 벡터 양자화가 설계에 SA 방법을 응용함으로써 SA 방법에 기초한 새로운 온라인 학습 알고리즘을 제안한다. 우리는 이 알고리즘을 OLVQ-SA 알고리즘이라 부르기로 한다. 가우스-마코프 소스와 음성데이터에 대한 벡터양자화 실험 결과 제안된 방법이 KLA 보다 일관되게 우수한 코드북을 생성함을 보인다.

• The Transactions of the Korea Information Processing Society
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• v.4 no.10
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• pp.2615-2628
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• 1997

In this paper, a new codebook design algorithm is proposed. It uses a DCT map based on two-dimensional discrete cosine of transform (2D DCT) and finite state vector quantizer (FSVQ) when the vector quantizer is designed for image transmission. We make the map by dividing input image according to edge quantity, then by the map, the significant features of training image are extracted by using the 2D DCT. A master codebook of FSVQ is generated by partitioning the training set using binary tree based on tree-structure. The state codebook is constructed from the master codebook, and then the index of input image is searched at not master codebook but state codebook. And, because the coding of index is important part for high speed digital transmission, it converts fixed length codes to variable length codes in terms of entropy coding rule. The huffman coding assigns transmission codes to codes of codebook. This paper proposes single-side growing huffman tree to speed up huffman code generation process of huffman tree. Compared with the pairwise nearest neighbor (PNN) and classified VQ (CVQ) algorithm, about Einstein and Bridge image, the new algorithm shows better picture quality with 2.04 dB and 2.48 dB differences as to PNN, 1.75 dB and 0.99 dB differences as to CVQ respectively.

• The Journal of the Acoustical Society of Korea
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• v.18 no.7
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• pp.33-38
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• 1999

In this paper, we combine a generalized analysis-by-synthesis (AbS) structure and an algebraic excitation scheme to propose a new 4kb/s speech codec. This codec partly uses the structure of G.729. We design a line spectrum pair (LSP) quantizer, an adaptive codebook, and an excitation codebook to fit the 4 kb/s bit rate. The codec has a 25㎳ algorithmic delay, which corresponds to a 20㎳ frame size and a 5㎳ lookahead. At the bit rates below 4kb/s, most CELP speech codecs using the AbS principle have a drawback that results a rapid degradation of speech quality. To overcome this drawback we use the generalized AbS structure which is efficient for the low bit rate speech codec. LP coefficients are converted to LSP and quantized using a predictive 2-stage VQ. A low complexity algebraic codebook which uses shifting method is used for the fixed codebook excitation, and gains of the adaptive codebook and the fixed codebook are quantized using the VQ. To evaluate the performance of the proposed codec A-B preference tests are done with the fixed rate 8kb/s QCELP. As the result of the test, the performance of the codec is similar to that of the fixed rate 8kb/s QCELP.

• Journal of IKEEE
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• v.21 no.4
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• pp.331-337
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• 2017

In this paper, we present the design of a 20MHz bandwidth 3rd-order continuous-time low-pass sigma-delta modulator with low-noise and low-power consumption. The bandwidth of the system is sufficient to accommodate LTE and other wireless network standards. The 3rd-order low-pass filter with feed-forward architecture achieves the low-power consumption as well as the low complexity. The system uses 3bit flash quantizer to provide fast data conversion. The current-steering DAC achieves low-power and improved sensitivity without additional circuitries. Cross-coupled transistors are adopted to reduce the current glitches. The proposed system achieves a peak SNDR of 65.9dB with 20MHz bandwidth and power consumption of 32.65mW. The in-band IM3 is simulated to be 69dBc with 600mVp-p two tone input tones. The circuit is designed in a 0.18-um CMOS technology and is driven by 500MHz sampling rate signal.

• Journal of Broadcast Engineering
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• v.2 no.2
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• pp.206-215
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• 1997

We pror.a;e a H.263-based video ceder with two-layer ocalability. The bare layer is ceded by using the default H.263 axling algorithms to achieve high compresred video data and the enhanced layer is axied by enhanced axling such as HVS-based quantization updating. The enhanced layer contains only arled refinement data for the OCT coefficients of the bare layer. Bitstream syntax and semantics for enhancement layer are designed and quantizer design using the HVS is pror.ooed. Data from the two layers are combined after inverse quantization and inverse OCT prcx:esses in the deaxier. We show with e~rirrental results that the pror.a;ed layered arlee achieves comparable picture quality with non-layered arlee at bitrates of 30 kbr;s or less. Overhead information for the bitstream layer can 00 limited to less than 0.5 kbits/frame.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.1
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• pp.1-9
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• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into a H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel for the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks. The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit or a field synchronized with the A/D converter. The implemented H/W used the 54％(12943) LAB(Logic Array Block) and 9％(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation. that is. processing 60 fields/sec(30 frames/sec).