• Title/Summary/Keyword: pulse-reverse

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Current Control of 12-pulse Dual Converter for High Current Coil Power Supply (대전류 코일 전원 공급장치를 위한 12펄스 듀얼 컨버터의 전류제어)

  • 송승호
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.4
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    • pp.332-338
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    • 2002
  • High current coil power supply for superconductivity coil of tokamak requires fast dynamics performance of di/dt and smooth change over of current direction. To meet the specification high performance DSP-based controller Is designed for 12-pulse thyristor dual converter with interphase transformer(IPT). Not only the total current of Y and $\Delta$ converter units but also the difference for those should be regulated fast and accurately. Proportional and integral controller is designed for current difference control and the controller output is compensated to $\Delta$ converter. The source voltage phase angle detection and gate pulse generation algorithm are implemented in software for higher reliability of current control. The current error Is reduced by selection of appropriate initial gating angle during the transient of change over of current direction between thyristor converters.

a-Si:H Image Sensor for PC Scanner

  • Hur, Chang-Wu
    • Journal of information and communication convergence engineering
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    • v.5 no.2
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    • pp.116-120
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    • 2007
  • In this paper, the image sensor using the a-Si:H TFT is proposed. The optimum amorphous silicon thin film is deposited using plasma enhanced chemical vapor deposition (PECVD). TFT and photodiode both with the thin film are fabricated and form image sensor. The photodiode shows that $I_{dark}\;is\;{\sim}10^{-13}\;A,\;I_{photo}\;is\;{\sim}10^{-9}\;A\;and\;I_{photo}/I_{dark}\;is\;{\sim}10^4$, respectively. In the case of a-Si:H TFT, it indicates that $I_{on}/I_{off}\;is\;10^6$, the drain current is a few ${\mu}A\;and\;V_{th}\;is\;2{\sim}4$ volts. For the analysis on the fabricated image sensor, the reverse bias of -5 volts in ITO of photodiode and $70 {\mu}sec$ pulse in the gate of TFT are applied. The image sensor with good property was conformed through the measured photo/dark current.

Analysis of Design Elements in HEMP Systems (HEMP 시스템의 설계 요소 분석)

  • Lee, Sun Yui;Kim, Jin Young;Park, Woo Chul
    • Journal of Satellite, Information and Communications
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    • v.8 no.4
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    • pp.6-11
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    • 2013
  • In this paper, we explain the signal characteristics of HEMP and HEMP protection factors that affect the facilities are analyzed. We find the necessary elements of the physical facilities available for building. Shielding effects were measured by changing frequency and the distance of receiving antenna. Each measured value was compared to U.S. standard and measuring method was simplified. shielding effects were measured by three different conditions of shielding room. Find the difference between forward measurement and reverse measurement and factors which affects the measurement in shielding room.

A Performance Testing Device of Drycell (건전지의 성능평가 장치)

  • Jeong, Heon
    • Journal of Institute of Control, Robotics and Systems
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    • v.17 no.2
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    • pp.171-175
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    • 2011
  • In this paper, I have developed a high-speed and high-resolution measuring device in order to check the performance of drycell. The system is developed for the drycell manufacturing plant. Measuring time is one of key factors to inference on the production speed. So the developed system is designed to generate the classified result up to 1200ea/min. In the other words, each product can be classified within 25ms. There have been many studies to estimate both state of charge as well as state of health, such as OCV (Open Circuit Voltage), SC (Short Circuit) and measuring impedance with frequency pulse. But those methods take a few second due to surface discharge. To overcome the phenomenon, I developed the method to engage the reverse current to two electrodes of battery. As a result, I could achieve to measure the indigenous capacity without the problem of surface discharge.

Hot-Carrier-Induced Degradation in Submicron MOS Transistors (Submicron MOS 트랜지스터의 뜨거운 운반자에 의한 노쇠현상)

  • 최병진;강광남
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.7
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    • pp.780-790
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    • 1988
  • We have studied the hot-carrier-induced degradation caused by the high channel electric field due to the decrease of the gate length of MOSFET used in VLSI. Under DC stress, the condition in which maximum substrate current occures gave the worst degradation. Under AC dynamic stress, other conditions, the pulse shape and the falling rate, gave enormous effects on the degradation phenomena, especially at 77K. Threshold voltage, transconductance, channel conductance and gate current were measured and compared under various stress conditions. The threshold voltage was almost completely recovered by hot-injection stress as a reverse-stress. But, the transconductance was rapidly degraded under hot-hole injection and recovered by sequential hot-electron stress. The Si-SiO2 interface state density was analyzed by a charge pumping technique and the charge pumping current showed the same trend as the threshold voltage shift in degradation process.

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A ZCT PWM Boost Converter using parallel MOSFET switch (병렬 MOSFET 스위치를 이용한 ZCT PWM Boost Converter)

  • Kim Tea-Woo;Hur Do-Gil;Kim Hack-Sung
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.759-762
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    • 2002
  • A ZCT(Zero Current Transition) PWM(Pulse-Width-Modulation) boost converter using parallel MOSFET switch is proposed in this paper. The IGBT(main switch) of the proposed converter is always turned on with zero current switching and turned off with zero current/zero voltage switching. The MOSFET(auxiliary switch) is also operates with soft switching condition. In addtion to, the proposed converter eliminates the reverse recovery current of the freewheeling diode by adding the resonant inductor, Lr, in series with the main switch. Therefore, the turn on/turn off switching losses of switches are minimized and the conduction losses by using IGBT switch are reduced. In addition to, using parallel MOSFET switch overcomes the switching frequency limitation occurred by current tail. As mentioned above, the characteristics are verified through experimental results.

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Low-cost crowbar system and protection scheme in capacitor bank module (커패시터 뱅크 모듈 구성에 있어서 경제적인 크로바 시스템과 보호회로)

  • Rim, Geun-Hie;Cho, Chu-Hyun;Lee, Hong-Sik;Pavlov, E.P.
    • Proceedings of the KIEE Conference
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    • 2000.07c
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    • pp.2089-2091
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    • 2000
  • Pulsed power systems consist of a capacitor bank, an isolated high-voltage charging power-supply, high-current bus-work for charging and discharging and a control system. In such pulsed power systems, the operating-lifetime of the capacitors is closely dependent on the voltage reversal. Hence, most capacitor-discharging systems includes crowbar circuits. The crowbar circuit prevents the capacitor recharging with reverse voltage. Usually it consists of crowbar resistors and high pulse-current diode-stacks connected in series. The requirements for the diode-stacks are fast-recovery time and high-voltage and large-current ratings, which results in the high cost of the pulsed-power system. This paper presents a protection scheme of a charging and discharging system of a 500kJ capacitor bank using a low-cost crowbar circuit and safety-fuses.

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High-Speed Cu Filling into TSV and Non-PR Bumping for 3D Chip Packaging (3차원 실장용 TSV 고속 Cu 충전 및 Non-PR 범핑)

  • Hong, Sung-Chul;Kim, Won-Joong;Jung, Jae-Pil
    • Journal of the Microelectronics and Packaging Society
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    • v.18 no.4
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    • pp.49-53
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    • 2011
  • High-speed Cu filling into a through-silicon-via (TSV) and simplification of bumping process by electroplating for three dimensional stacking of Si dice were investigated. The TSV was prepared on a Si wafer by deep reactive ion etching, and $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to increase the filling rate of Cu into the via, a periodic-pulse-reverse wave current was applied to the Si chip during electroplating. In the bumping process, Sn-3.5Ag bumping was performed on the Cu plugs without lithography process. After electroplating, the cross sections of the vias and appearance of the bumps were observed by using a field emission scanning electron microscope. As a result, voids in the Cu-plugs were produced by via blocking around via opening and at the middle of the via when the vias were plated for 60 min at -9.66 $mA/cm^2$ and -7.71 $mA/cm^2$, respectively. The Cu plug with a void or a defect led to the production of imperfect Sn-Ag bump which was formed on the Cu-plug.

High Efficiency Triple Mode Boost DC-DC Converter Using Pulse-Width Modulation (펄스폭 변조를 이용한 고효율 삼중 모드 부스트 변환기)

  • Lee, Seunghyeong;Han, Sangwoo;Kim, Jongsun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.2
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    • pp.89-96
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    • 2015
  • This paper presents a high efficiency, PSM/DCM/CCM triple mode boost DC-DC converter for mobile application. This device operates at Pulse-Skipping Mode(PSM) when it enters light load, and otherwise operate the operating frequency of 1.4MHz with Pulse-Width Modulation(PWM) mode. Especially in order to improve the efficiency during the Discontinuous-Conduction Mode(DCM) operation period, the reverse current prevention circuit and oscillations caused by the inductor and the parasitic capacitor to prevent the Ringing killer circuit is added. The input voltage of the boost converter ranges from 2.5V ~ 4.2V and it generates the output of 4.8V. The measurement results show that the boost converter provides a peak efficiency of 92% on CCM and 87% on DCM. And an efficiency-improving PWM operation raises the efficiency drop because of transition from PWM to PFM. The converter has been fabricated with a 0.18um Dongbu BCDMOS technology.

$CF_4$/Ar를 이용한 유기고분자 기판의 펄스 직류전원 건식 식각

  • Kim, Jin-U;Choe, Gyeong-Hun;Park, Dong-Gyun;Jo, Gwan-Sik;Lee, Je-Won
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.91-91
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    • 2010
  • 본 논문은 펄스 직류전원 (Pulse DC) 플라즈마 소스와 반응성 가스인 $CF_4$와 불활성 가스인 Ar를 혼합하여 산업에서 널리 사용되는 유기고분자인 Polymethylmethacrylate (PMMA), Polyethylene terephthalate (PET), 그리고 Polycarbonate (PC) 샘플을 건식 식각한 결과에 대한 것이다. 각각의 샘플은 감광제 도포 후에 자외선을 조사하는 포토레지스트 방법으로 마스크를 만들었다. 펄스 직류전원 플라즈마 시스템을 사용하면 다양한 변수를 줄 수 있다는 장점이 있다. 공정 변수는 Pulse DC Voltage는 300 - 500 V, Pulse DC reverse time $0.5{\sim}2.0\;{\mu}s$, Pulse DC Frequency 100~250 kHz 이었다. 변수 각각의 값이 높아질수록 고분자의 식각률이 높아졌다. 특히, PMMA의 식각률이 가장 높았으며 PET, PC 순이었다. 샘플 중 PC의 식각률이 가장 낮은 이유는 고분자 결합 중에 이중결합의 벤젠 고리 모양을 포함하고 있어 분자 결합력이 비교적 높기 때문으로 사료된다. 기계적 펌프만을 사용한 공정 전 압력은 30 mTorr이었다. 쓰로틀 밸브를 완전 개방한 상태에서 식각 공정 중 진공 압력은 $CF_4$ 가스유량이 늘어날수록 증가하였다. 식각률 역시 $CF_4$ 가스유량(총 가스 유량은 10 sccm)이 많을수록 증가함을 보여주었다 (PMMA: 10 sccm $CF_4$에서 330 nm/min, 3.5 sccm $CF_4$/6.5 sccm Ar에서 260 nm/min., PET: 10 sccm $CF_4$에서 260 nm/min, 3.5 sccm $CF_4$/6.5 sccm Ar에서 210 nm., PC: 10 sccm $CF_4$에서 230 nm, 3.5 sccm $CF_4c$/6.5 sccm Ar에서 160 nm). 이는 펄스 직류전원 플라즈마 식각에서 $CF_4$와 Ar의 가스 혼합비를 조절함으로서 고분자 소재의 식각률을 적절히 변화시킬 수 있다는 것을 의미한다. 표면 거칠기는 실험 후 표면단차 측정기와 전자 현미경 등을 이용하여 식각한 샘플의 표면을 측정하여 알 수 있었다. 실험전 기준 샘플 표면 거칠기는 PMMA는 1.53nm, PET는 3.1nm, PC는 1.54nm 이었다. 식각된 샘플들의 표면 거칠기는 PMMA는 3.59~10.59 nm, PET은 5.13~11.32 nm, PC는 1.52~3.14 nm 범위였다. 광학 발광 분석기 (Optical emission spectroscopy)를 이용하여 식각 공정 중 플라즈마 발광특성을 분석한 결과, 탄소 원자 픽 (424.662 nm)과 아르곤 원자 픽 (751.465 nm, 763.510 nm)의 픽의 존재를 확인하였다. 이 때 탄소 픽은 $CF_4$ 가스에서 발생하였을 것으로 추측한다. 본 발표를 통해 펄스 직류전원 $CF_4$/Ar의 고분자 식각 결과에 대해 보고할 것이다.

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