• The Korean Journal of Pain
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• v.33 no.2
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• pp.99-107
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• 2020

Chronic severe pain results in a detrimental effect on the patient's quality of life. Such patients have to take a large number of medications, including opioids, often without satisfactory effect, sometimes leading to medication abuse and the pain worsening. Spinal cord stimulation (SCS) is one of the most effective technologies that, unlike other interventional pain treatment methods, achieves long-term results in patients suffering from chronic neuropathic pain. The first described mode of SCS was a conventional tonic stimulation, but now the novel modalities (high-frequency and burst), techniques (dorsal root ganglia stimulations), and technical development (wireless and implantable pulse generator-free systems) of SCS are becoming more popular. The improvement of SCS systems, their miniaturization, and the appearance of new mechanisms for anchoring electrodes results in a significant reduction in the rate of complications and revision surgeries, and the appearance of new waves of stimulation allows not only to avoid the phenomenon of addiction, but also to improve the long-term results of chronic SCS. The purpose of this review is to describe the current condition of SCS and up-to-date technical advances.

• Journal of Korean Neurosurgical Society
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• v.58 no.4
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• pp.368-372
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• 2015

Objective : The occurrence of acute cerebral infection following deep brain stimulation (DBS) is currently being reported with elevation of C-reactive protein (CRP) level. The aim of the present study was to establish normal range of the magnitude and time-course of CRP increases following routine DBS procedures in the absence of clinical and laboratory signs of infection. Methods : A retrospective evaluation of serial changes of plasma CRP levels in 46 patients undergoing bilateral, two-staged DBS was performed. Because DBS was performed as a two-staged procedure involving; implantation of lead and internal pulse generator (IPG), CRP was measured preoperatively and postoperatively every 2 days until normalization of CRP (post-lead implantation day 2 and 4, post-IPG implantation day 2, 4, and 6). Results : Compared with preoperative CRP levels ($0.12{\pm}0.17mg/dL$, n=46), mean CRP levels were significantly elevated after lead insertion day 2 and 4 ($1.68{\pm}1.83mg/dL$, n=46 and $0.76{\pm}0.38mg/dL$, n=16, respectively, p<0.001). The mean CRP levels at post-lead implantation day 2 were further elevated at post-IPG implantation day 2 ($3.41{\pm}2.56mg/dL$, n=46, respectively, p<0.01). This elevation in post-IPG day 2 rapidly declined in day 4 ($1.24{\pm}1.29mg/dL$, n=46, p<0.05) and normalized to preoperative value at day 6 ($0.42{\pm}0.33mg/dL$, n=46, p>0.05). Mean CRP levels after IPG implantation were significantly higher in patients whose IPGs were implanted at post-lead day 3 than those at post-lead day 5-6 ($3.99{\pm}2.80mg/dL$, n=30, and $2.31{\pm}1.56mg/dL$, n=16, respectively, p<0.05). However, there was no difference in post-IPG day 2 and 4 between them (p>0.05). Conclusion : The mean postoperative CRP levels were highest on post-IPG insertion day 2 and decreased rapidly, returning to the normal range on post-IPG implantation day 6. The duration of post-lead implantation period influenced the magnitude of CRP elevation at post-IPG insertion day 2. Information about the normal response of CRP following DBS could help to avoid unnecessary diagnostic and therapeutic efforts.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.139-139
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• 2010

금속 실리사이드 나노입자는 열적 및 화학적 안정성이 뛰어나고, 절연막내에 일함수 차이에 따라 깊은 양자 우물구조가 형성되어 비휘발성 메모리 소자를 제작할 수 있다. 그러나 단일 $SiO_2$ 절연막을 사용하였을 경우 저장된 전하의 정보 저장능력 및 쓰기/지우기 시간을 향상시키는 데 물리적 두께에 따른 제한이 따른다. 본 연구에서는 터널장벽 엔지니어링을 통하여 물리적인 두께는 단일 $SiO_2$ 보다는 두꺼우나 쓰기/지우기 동작을 위하여 인가되는 전기장에 의하여 상대적으로 전자가 느끼는 상대적인 터널 절연막 두께를 감소시키는 방법으로 동작속도를 향상 시킨 $SiO_2/Si_3N_4/SiO_2$ 및 $Si_3N_4/SiO_2/Si_3N_4$ 터널 절연막을 사용한 금속 실리사이드 나노입자 비휘발성 메모리를 제조하였다. 제조방법은 우선 p-type 실리콘 웨이퍼 위에 100 nm 두께로 증착된 Poly-Si 층을 형성 한 이후 소스와 드레인 영역을 리소그래피 방법으로 형성시켜 트랜지스터의 채널을 형성한 이후 그 상부에 $SiO_2/Si_3N_4/SiO_2$ (2 nm/ 2 nm/ 3 nm) 및 $Si_3N_4/SiO_2/Si_3N_4$ (2 nm/ 3 nm/ 3 nm)를 화학적 증기 증착(chemical vapor deposition)방법으로 형성 시킨 이후, direct current magnetron sputtering 방법을 이용하여 2~5 nm 두께의 $WSi_2$ 및 $TiSi_2$ 박막을 증착하였으며, 나노입자 형성을 위하여 rapid thermal annealing(RTA) system을 이용하여 $800{\sim}1000^{\circ}C$에서 질소($N_2$) 분위기로 1~5분 동안 열처리를 하였다. 이후 radio frequency magnetron sputtering을 이용하여 $SiO_2$ control oxide layer를 30 nm로 증착한 후, RTA system을 이용하여 $900^{\circ}C$에서 30초 동안 $N_2$ 분위기에서 후 열처리를 하였다. 마지막으로 thermal evaporator system을 이용하여 Al 전극을 200 nm 증착한 이후 리소그래피와 식각 공정을 통하여 채널 폭/길이 $2{\sim}5{\mu}m$인 비휘발성 메모리 소자를 제작하였다. 제작된 비휘발성 메모리 소자는 HP 4156A semiconductor parameter analyzer와 Agilent 81101A pulse generator를 이용하여 전기적 특성을 확인 하였으며, 측정 온도를 $25^{\circ}C$, $85^{\circ}C$, $125^{\circ}C$로 변화시켜가며 제작된 비휘발성 메모리 소자의 열적 안정성에 관하여 연구하였다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.9
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• pp.21-26
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• 2016

This paper presents a step-down DC-DC buck converter with a CCM/DCM dual-mode function for the internal power stage of portable electronic device. The proposed converter that is operated with a high frequency of 1 MHz consists of a power stage and a control block. The power stage has a power MOS transistor, inductor, capacitor, and feedback resistors for the control loop. The control part has a pulse width modulation (PWM) block, error amplifier, ramp generator, and oscillator. In this paper, an external capacitor for compensation has been replaced with a multiplier equivalent CMOS circuit for area reduction of integrated circuits. In addition, the circuit includes protection block, such as over voltage protection (OVP), under voltage lock out (UVLO), and thermal shutdown (TSD) block. The proposed circuit was designed and verified using a $0.18{\mu}m$ CMOS process parameter by Cadence Spectra circuit design program. The SPICE simulation results showed a peak efficiency of 94.8 %, a ripple voltage of 3.29 mV ripple, and a 1.8 V output voltage with supply voltages ranging from 2.7 to 3.3 V.

• Geophysics and Geophysical Exploration
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• v.8 no.3
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• pp.224-231
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• 2005

In geophysical field surveys, commercial equipments often fail to resolve the subsurface target or even sometimes fail to be applied because they do not fit to the various field situations or the physical properties of the medium or target. We developed a geophysical measurement system, which can be easily adapted for the various field situations and targets. The system based on PXI with A/D converter and some stand alone equipment such as Network Analyzer was applied to borehole radar survey, borehole sonic measurement and electromagnetic noise measurement. The system for borehole radar survey consists of PXI, Network Analyzer, dipole antennas, GPIB interface is used for PXI to control Network Analyzer. The system for borehole sonic measurement consists of PXI, 24 Bit A/D converter, high voltage pulse generator, transmitting and receiving piezoelectric sensors. The electromagnetic noise measurement system consists of PXI, 24 Bit A/D converter, 2 horizontal component electric field sensors and 2 horizontal and 1 vertical component magnetic filed sensors. The borehole radar system has been successfully applied to detect the width of the artificial tunnel through which the borehole pass and to image buried steel pipe, while the commercial borehole radar equipment failed. The borehole sonic system was tested to detect the width of artificial tunnel and showed a reasonable result. The characteristic of electromagnetic noise was grasped at an urban area with the data from the electromagnetic noise measurement system. The system is also applied to characterize the signal distortion by induction between the electric cables in resistivity survey. The system can be applied various geophysical problems with a simple modification of the system and sensors.