• Title/Summary/Keyword: pulse Shaping Filter

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BASK System Design For Giga-Bit MODEM (Giga-Bit MODEM을 위한 BASK 시스템 설계)

  • Eom, Ki-Hwan;Kang, Seong-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.12
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    • pp.111-116
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    • 2005
  • We propose a BASK (Binary Amplitude Shift Keying) system for Giga-bit Modem in millimeter band. The proposed system consists of a high speed shutter of the transmitter and a repeater of the receiver. The shutter of the proposed system is introduced for pulse shaping to improve the intersymbol interference (ISI). The repeater consists of several stage converters. A converter is constructed with a low pass filter and a limiter. The repeater can improve the signal-to-noise ratio (SNR) and make the rectangular pulse train. The proposed system is a simple system that uses conversion method without IF (Intermediate Frequency) process.

Performance Analysis of Clock Recovery for OFDM/QPSK-DMR System Using Band Limited-Pulse Shaping Filter (대역 제한 필터를 이용하는 OFDM/QPSK-DMR 시스템을 위한 클럭 복조기의 성능 분석)

  • 안준배;양희진;강희곡;오창헌;조성준
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.2
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    • pp.245-249
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    • 2004
  • In this paper, we have proposed a clock recovery algorithm of Orthogonal Frequency Division Multiplexing/Quadrature Phase Shift Keying Modulation-Digital Microwave Radio(OFDM/QPSK-DMR) system using Band Limited-Pulse Shaping Filter(BL-PSF) and compared the clock phase error variance of OFDM/QPSK-DMR system with that of single carrier DMR system. The OFDM/QPSK-DMR system using windowing method requires training sequence or Cyclic Prefix (CP) to synchronize the clock phase of received signal. But transmit efficient is increased in our proposed DMR system because of no using redundant data such as training sequence or CP. The proposed clock recovery algorithm is simply realized in the OFDM/QPSK-DMR system using BL-PSF. The simulation results confirm that the proposed clock recovery algorithm has the same clock phase error variance performance in a single carrier DR system under Additive White Gaussian Noise(AWGN) environment.

Simple Design of Equiripple Square Root Pulse Shaping Filter (Square-root 형 등리플 파형성형 필터의 간단한 설계)

  • 황정진;오우진
    • Proceedings of the IEEK Conference
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    • 2001.06d
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    • pp.261-264
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    • 2001
  • In this paper, we introduce a simple design method f9r mot-squared type raised cosine filter with equiripple characteristics. Through some design examples, we show that the proposed filter has much better performance in ripple than the conventional SRCF at the expense of small increasing of ISI. In addition, the proposed Inter is compatible with conventional SRCF. Finally, we designs the filter for W-CDMPI which uses RRC (Root Raised Cosine) with a=0.22, in 12bit finite precision.

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FIR Filter Design for SSB/BPSK-DS/CDMA Using Look-Up Table (Look-Up 테이블을 이용한 SSB/BPSK-DS/CDMA용 FIR 필터 설계)

  • 김명순
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.10A
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    • pp.1598-1603
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    • 2000
  • In this paper, an efficient pulse shaping filter architecture for SSB/BPSK-DS/CDMA is proposed. The filter satisfies the specifications in IS-95. The proposed architecture is based on polyphase decomposition and look-up table method. By exploiting the linear phase property of the decomposed filter coefficients, the chip area required for look-up table can be reduced by half compared with the conventional methods. By Synopsys simulations, it is shown that the use of the proposed method can result in reduction in the number of gates by 40%.

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Design and Implementation of 64 QAM(155Mbps) Demodulator for Transmitting Digital Microwave Radio (Digital Microwave Radio 신호전송을 위한 64QAM(155Mbps) 복조기 설계 및 구현)

  • 방효창;안준배;이대영;조성준;김원후
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.11
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    • pp.2081-2093
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    • 1994
  • In this study, we design and implement 64 QAM demodulator which has 155 Mbps, first level of CCITT G707 SDH(Synchronous Digital Hierachy) for STM 1 signal transmission. Carrier recovery which effects the demodulator performance uses decision feedback carrier using 8 bits A/D converter. Also, PSF(Pulse Shaping Filter) is 7 order elliptic filter. Carrier recovery circuit is designed and implemented digital type which use high 3 bits of 8 bits conversion data as data and the order low bits as error data and hybrid type which use VCO and analog integrator. Therefore we obtain stable performance recovery.

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Simple desing of FIR filters using resistor array (저항열을 이용한 간단한 FIR 필터의 설계방법)

  • 김제우;김진규;조민형
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.9
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    • pp.22-26
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    • 1994
  • In this paper a method of designing FIR filters without digital arithmetic operationsi is persented. The filter coefficients are represented by resistors combined with a differential amplifier. With this method an FIR filter can be simply impemented without refering to complex digital arithmetic operations. Furthermore, in this scheme, no additional D/A converter is needed for D/A conversion. Spectral response response of a pulse shaping filter of 17 coefficients is shown as an illustration.

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Design of Efficient Trapezoidal Filter and Peak Value Detection Circuit for XRF Systems (XRF시스템용 효율적인 Trapezoidal 필터 및 최대값 검출 회로 설계)

  • Piao, Zheyan;Chung, Jin-Gyun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.6
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    • pp.138-144
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    • 2013
  • In XRF systems, various techniques have been developed for the synthesis of pulse shapes using digital methods instead of traditional analog methods. Trapezoidal pulse shaping algorithms can be used for digital multi-channel pulse height analysis in X-ray spectrometer systems. In this paper, an efficient trapezoidal filter architecture is presented. In addition, we present a hardware-efficient peak value detection algorithm. By the proposed algorithm, peak value detection error is decreased by half compared with the conventional algorithm. The proposed Digital Pulse Processing(DPP) algorithm is designed using Verilog HDL and implemented using an FPGA on a test board. It is demonstrated that the implemented DPP board works successfully in practical XRF systems.

Design and Performance Analysis of a Noncoherent Code Tracking Loop for 3GPP MODEM (3GPP 모뎀용 동기 추적회로의 설계 및 성능 분석)

  • 양연실;박형래
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.12A
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    • pp.983-990
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    • 2003
  • In this paper, a noncoherent code tracking loop is designed for 3GPP MODEM and its performance is analyzed in terms of steady-state jitter variance and transient response characteristics. An analytical closed-form formula for steady-state jitter variance is Int derived for AWGN environments as a general function of a pulse-shaping filter, timing offset, signal-to-interference ratio, and loop bandwidth, together with the analysis on the transient response characteristic of a tracking loop. Based on the analysis, the code tracking loop with variable loop bandwidth that is efficient for full digital H/W implementation is designed and its performance is compared with that of the code tracking loop with fixed loop bandwidth, along with the verification by computer simulations.

Performance Analysis of OFDM/QPSK-DMR System Using One-tap Adaptive Equalizer over Microwave Channel Environments (Microwave 채널 환경에서 단일적응등화기를 이용하는 OFDM/QPSK-DMR 시스템의 성능 분석)

  • 안준배;양희진;조성언;오창헌;조성준
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.3
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    • pp.517-522
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    • 2004
  • In this paper, we have analyzed the performance enhancement of Orthogonal Frequency Division Multiplexing/Quadrature Phase Shift Keying Modulation-Digital Microwave Radio(OFDM/QPSK-DMR) system using Band Limited-Pulse Shaping Filter(BL-PSF) over microwave channel environments. For performance enhancement, the one-tap adaptive equalizer is adopted in the OFDM/QPSK-DMR system and than both BER and signature curve performance are compared with those of single carrier DMR system. Computer simulations confirm that the OFDM/QPSK-DMR system using 16 sub-carrier increase the fade margin about 2 dB over microwave channel environments and that of performance using one-tap adaptive equalizer is highly increased the fade margin as the number of sub-carriers is larger.

Performance of Initial Timing Acquisition in the DS-UWB Systems with Different Transmit Pulse Shaping Filters (DS-UWB 시스템에서 송신 필터에 따른 초기 동기 획득 성능 비교)

  • Kang, Kyu-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.5
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    • pp.493-502
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    • 2009
  • In this paper, we compare the performance of initial timing acquisition in direct sequence ultra-wideband(DS-UWB) systems with different transmit pulse shaping filters through extensive computer simulations. Simulation results show that the timing acquisition performance of the DS-UWB system, whose chip rate is 1.32 Gchip/s, employing a rectangular transmit filter is similar to that employing a square root raised cosine(SRRC) filter with an interpolation factor of 4 in the realistic UWB channels(CM1 and CM3) as well as the additive white Gaussian noise(AWGN) channel. Additionally, we present both a 24-parallel digital correlator structure and a 24-parallel processing searcher operating at a 55 MHz system clock, and then briefly discuss the initial timing acquisition procedure. Because we can adopt an 1.32 Gsample/s digital-to-analog(D/A) converter and an 1.32 Gsample/s analog-to-digital(AID) converter in the DS-UWB system by employing the rectangular transmit filter, we have a realistic solution for the DS-UWB chipset development.