• Title/Summary/Keyword: processing time

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Distributed Processing System Design and Implementation for Feature Extraction from Large-Scale Malicious Code (대용량 악성코드의 특징 추출 가속화를 위한 분산 처리 시스템 설계 및 구현)

  • Lee, Hyunjong;Euh, Seongyul;Hwang, Doosung
    • KIPS Transactions on Computer and Communication Systems
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    • v.8 no.2
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    • pp.35-40
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    • 2019
  • Traditional Malware Detection is susceptible for detecting malware which is modified by polymorphism or obfuscation technology. By learning patterns that are embedded in malware code, machine learning algorithms can detect similar behaviors and replace the current detection methods. Data must collected continuously in order to learn malicious code patterns that change over time. However, the process of storing and processing a large amount of malware files is accompanied by high space and time complexity. In this paper, an HDFS-based distributed processing system is designed to reduce space complexity and accelerate feature extraction time. Using a distributed processing system, we extract two API features based on filtering basis, 2-gram feature and APICFG feature and the generalization performance of ensemble learning models is compared. In experiments, the time complexity of the feature extraction was improved about 3.75 times faster than the processing time of a single computer, and the space complexity was about 5 times more efficient. The 2-gram feature was the best when comparing the classification performance by feature, but the learning time was long due to high dimensionality.

Unmanned Aircraft Platform Based Real-time LiDAR Data Processing Architecture for Real-time Detection Information (실시간 탐지정보 제공을 위한 무인기 플랫폼 기반 실시간 LiDAR 데이터 처리구조)

  • Eum, Junho;Berhanu, Eyassu;Oh, Sangyoon
    • KIISE Transactions on Computing Practices
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    • v.21 no.12
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    • pp.745-750
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    • 2015
  • LiDAR(Light Detection and Ranging) technology provides realistic 3-dimension image information, and it has been widely utilized in various fields. However, the utilization of this technology in the military domain requires prompt responses to dynamically changing tactical environment and is therefore limited since LiDAR technology requires complex processing in order for extensive amounts of LiDAR data to be utilized. In this paper, we introduce an Unmanned Aircraft Platform Based Real-time LiDAR Data Processing Architecture that can provide real-time detection information by parallel processing and off-loading between the UAV processing and high-performance data processing areas. We also conducted experiments to verify the feasibility of our proposed architecture. Processing with ARM cluster similar to the UAV platform processing area results in similar or better performance when compared to the current method. We determined that our proposed architecture can be utilized in the military domain for tactical and combat purposes such as unmanned monitoring system.

Distributed Computing Models for Wireless Sensor Networks (무선 센서 네트워크에서의 분산 컴퓨팅 모델)

  • Park, Chongmyung;Lee, Chungsan;Jo, Youngtae;Jung, Inbum
    • Journal of KIISE
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    • v.41 no.11
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    • pp.958-966
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    • 2014
  • Wireless sensor networks offer a distributed processing environment. Many sensor nodes are deployed in fields that have limited resources such as computing power, network bandwidth, and electric power. The sensor nodes construct their own networks automatically, and the collected data are sent to the sink node. In these traditional wireless sensor networks, network congestion due to packet flooding through the networks shortens the network life time. Clustering or in-network technologies help reduce packet flooding in the networks. Many studies have been focused on saving energy in the sensor nodes because the limited available power leads to an important problem of extending the operation of sensor networks as long as possible. However, we focus on the execution time because clustering and local distributed processing already contribute to saving energy by local decision-making. In this paper, we present a cooperative processing model based on the processing timeline. Our processing model includes validation of the processing, prediction of the total execution time, and determination of the optimal number of processing nodes for distributed processing in wireless sensor networks. The experiments demonstrate the accuracy of the proposed model, and a case study shows that our model can be used for the distributed application.

Analysis of Geometric Calibration Accuracy using the Results from IR Channel Nominal Radiometric Calibration (적외채널 기본 복사보정 결과를 이용한 기하보정 처리의 정확도 분석)

  • Seo, Seok-Bae;Kwon, Eun-Joo;Jin, Kyoung-Wook
    • Aerospace Engineering and Technology
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    • v.12 no.2
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    • pp.147-155
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    • 2013
  • The nominal radiometric calibration equation and additional five algorithms are applied in the infrared channel radiometric calibration for the COMS (Communication, Ocean, Meteorological Satellite) MI (Meteorological Imager). The processing end time of the radiometric calibration is directly related with the start time of geometric calibration processing since the geometric calibration processing is followed by that of the radiometric calibration. This paper describes comparison and analysis results for geometric calibration processing using two types of the radiometric calibration results, outputs from only the nominal radiometric calibration equation and outputs from the complete one (the nominal radiometric calibration equation with additional five algorithms), to propose a method with the earlier start time of the geometric calibration processing. Experimental results show that both of radiometric calibration results, from the nominal radiometric calibration equation with a fast processing speed and from the complete one with accurate radiometric values, can be used in the geometric calibration as the appropriate inputs because those processing results satisfied the requirements of geometric calibration processing accuracy. Thus the radiometric calibration results from the nominal radiometric calibration equation can be used to improve geometric calibration processing time.

An Implementation of SoC FPGA-based Real-time Object Recognition and Tracking System (SoC FPGA 기반 실시간 객체 인식 및 추적 시스템 구현)

  • Kim, Dong-Jin;Ju, Yeon-Jeong;Park, Young-Seak
    • IEMEK Journal of Embedded Systems and Applications
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    • v.10 no.6
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    • pp.363-372
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    • 2015
  • Recent some SoC FPGA Releases that integrate ARM processor and FPGA fabric show better performance compared to the ASIC SoC used in typical embedded image processing system. In this study, using the above advantages, we implement a SoC FPGA-based Real-Time Object Recognition and Tracking System. In our system, the video input and output, image preprocessing process, and background subtraction processing were implemented in FPGA logics. And the object recognition and tracking processes were implemented in ARM processor-based programs. Our system provides the processing performance of 5.3 fps for the SVGA video input. This is about 79 times faster processing power than software approach based on the Nios II Soft-core processor, and about 4 times faster than approach based the HPS processor. Consequently, if the object recognition and tracking system takes a design structure combined with the FPGA logic and HPS processor-based processes of recent SoC FPGA Releases, then the real-time processing is possible because the processing speed is improved than the system that be handled only by the software approach.

Plurality Rule-based Density and Correlation Coefficient-based Clustering for K-NN

  • Aung, Swe Swe;Nagayama, Itaru;Tamaki, Shiro
    • IEIE Transactions on Smart Processing and Computing
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    • v.6 no.3
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    • pp.183-192
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    • 2017
  • k-nearest neighbor (K-NN) is a well-known classification algorithm, being feature space-based on nearest-neighbor training examples in machine learning. However, K-NN, as we know, is a lazy learning method. Therefore, if a K-NN-based system very much depends on a huge amount of history data to achieve an accurate prediction result for a particular task, it gradually faces a processing-time performance-degradation problem. We have noticed that many researchers usually contemplate only classification accuracy. But estimation speed also plays an essential role in real-time prediction systems. To compensate for this weakness, this paper proposes correlation coefficient-based clustering (CCC) aimed at upgrading the performance of K-NN by leveraging processing-time speed and plurality rule-based density (PRD) to improve estimation accuracy. For experiments, we used real datasets (on breast cancer, breast tissue, heart, and the iris) from the University of California, Irvine (UCI) machine learning repository. Moreover, real traffic data collected from Ojana Junction, Route 58, Okinawa, Japan, was also utilized to lay bare the efficiency of this method. By using these datasets, we proved better processing-time performance with the new approach by comparing it with classical K-NN. Besides, via experiments on real-world datasets, we compared the prediction accuracy of our approach with density peaks clustering based on K-NN and principal component analysis (DPC-KNN-PCA).

Hardware Architecture for Entropy Filter Implementation (엔트로피 필터 구현에 대한 Hardware Architecture)

  • Sim, Hwi-Bo;Kang, Bong-Soon
    • Journal of IKEEE
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    • v.26 no.2
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    • pp.226-231
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    • 2022
  • The concept of information entropy has been widely applied in various fields. Recently, in the field of image processing, many technologies applying the concept of information entropy have been developed. As the importance and demand of computer vision technologies increase in modern industry, real-time processing must be possible in order for image processing technologies to be efficiently applied to modern industries. Extracting the entropy value of an image is difficult to process in real-time due to the complexity of computation in software, and a hardware structure of an image entropy filter capable of real-time processing has never been proposed. In this paper, we propose for the first time a hardware structure of a histogram-based entropy filter that can be processed in real time using a barrel shifter. The proposed hardware was designed using Verilog HDL, and Xilinx's xczu7ev-2ffvc1156 was set as the target device and FPGA was implemented. As a result of logic synthesis using the Xilinx Vivado program, it has a maximum operating frequency of 750.751 MHz in a 4K UHD high-resolution environment, and it processes more than 30 images per second and satisfies the real-time processing standard.

An Efficient Signal Processing Scheme Using Signal Compression for Software GPS Receivers

  • Cho Deuk-Jae;Lim Deok-Won;Park Chan-Sik;Lee Sang-Jeong
    • International Journal of Control, Automation, and Systems
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    • v.4 no.3
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    • pp.344-350
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    • 2006
  • The software GPS receivers based on the SDR technology provide the ability to easily adapt the other signal processing algorithms without changing or modifying the hardware of the GPS receiver. However, it is difficult to implement the software GPS receivers using a commercial processor because of the heavy computational burden for processing the GPS signals in real-time. This paper proposes an efficient GPS signal processing scheme to reduce the computational burden for processing the GPS signals in the software GPS receiver, which uses a fundamental notion compressing the replica signals and the encoded look-up table method to generate correlation values between GPS signals and replica signals. In this paper, it is explained that the computational burden of the proposed scheme is much smaller than that of the typical GPS signal processing scheme. Finally, the processing time of the proposed scheme is compared with that of the typical scheme, and the improvement in the aspect of the computational burden is also shown.

Image Pre-Processing Method and its Hardware Implementation for Real-Time Image Processing (실시간 영상처리를 위한 영상 전처리 방법 및 하드웨어 구현)

  • Kwak, Seong-in;Park, Jong-sik
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.999-1002
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    • 2013
  • There are numerous image processing systems these are usually depend on high performance processors. However, systems using high performance processors might not be proper to mobile applications or low-power systems. Therefore, more efficient methodology for image processing is required for variable applications. This paper proposed pre-processing method using intra prediction concept in order to reduce processing range in a image picture(frame) and entire processing time. Also, the system configuration based on intra prediction hardware core and implementation result of the hardware core are presented in this paper.

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