• Title/Summary/Keyword: process in the loop simulation

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On-Machine Measurement of Sculptured Surfaces Based on CAD/CAM/CAI Integration : I. Measurement Error Modeling (CAD/CAM/CAI 통합에 기초한 자유곡면의 On-Machine Measurement : I. 측정오차 모델링)

  • Cho, Myeong-Woo;Lee, Se-Hee;Seo, Tae-Il
    • Journal of the Korean Society for Precision Engineering
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    • v.16 no.10
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    • pp.172-181
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    • 1999
  • The objective of this research is to develop a measurement error model for sculptured surfaces in On-Machine Measurement (OMM) process based on a closed-loop configuration. The geometric error model of each axis of a vertical CNC Machining center is derived using a 4${\times}$4 homogeneous transformation matrix. The ideal locations of a touch-type probe for the scupltured surface measurement are calculated from the parametric surface representation and X-, Y- directional geometric errors of the machine. Also, the actual coordinates of the probe are calculated by considering the pre-travel variation of a probe and Z-directional geometric errors. Then, the step-by-step measurement error analysis method is suggested based on a closed-loop configuration of the machining center including workpiece and probe errors. The simulation study shows the simplicity and effectiveness of the proposed error modeling strategy.

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Measurement Error Modeling for On-Machine Measurement of Sculptured Surfaces

  • Cho, Myeong-Woo;Lee, Se-Hee;Seo, Tae-Il
    • International Journal of Precision Engineering and Manufacturing
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    • v.2 no.2
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    • pp.73-80
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    • 2001
  • The objective of this research is to develop a measurement error model for sculptured surface in On-Machine Measurement(OMM) process based on a closed-loop configuration. The geometric error model of each axis of a vertical CNC machining center is derived using a 4$\times$4 homogeneous transformation matrix. The ideal locations of a touch-type probe for the sculptured surface measurement are calculated from the parametric surface representation and X-, Y- directional geometric errors of the machine. Also the actual coordinates of the probe are calculated by considering the pre-travel variation of a probe and Z-directional geometric errors. Then, the step-by-sep measurement error analysis method is suggested based on a closed-loop configuration of the machining center including workpiece and probe errors. The simulation study shows the simplicity and effectiveness of the proposed error modeling strategy.

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A Low-N Phase Locked Loop Clock Generator with Delay-Variance Voltage Converter and Frequency Multiplier (낮은 분주비의 위상고정루프에 주파수 체배기와 지연변화-전압 변환기를 사용한 클럭 발생기)

  • Choi, Young-Shig
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.6
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    • pp.63-70
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    • 2014
  • A low-N phase-locked loop clock generator with frequency multiplier is proposed to improve phase noise characteristic. Delay-variance voltage converter (DVVC) generates output voltages according to the delay variance of delay stages in voltage controlled oscillator. The output voltages of average circuit with the output voltages of DVVC are applied to the delay stages in VCO to reduce jitter. The HSPICE simulation of the proposed phase-locked loop clock generator with a $0.18{\mu}m$ CMOS process shows an 11.3 ps of peak-to-peak jitter.

A Route Repair Scheme for Reducing DIO Poisoning Overhead in RPL-based IoT Networks (RPL 기반 IoT 네트워크에서 DIO Poisoning 오버헤드를 감소시키는 경로 복구 방법)

  • Lee, Sung-Jun;Chung, Sang-Hwa
    • Journal of KIISE
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    • v.43 no.11
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    • pp.1233-1244
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    • 2016
  • In the IoT network environments for LLNs(Low power and Lossy networks), IPv6 Routing Protocol for Low Power and Lossy networks(RPL) has been proposed by IETF(Internet Engineering Task Force). The goal of RPL is to create a directed acyclic graph, without loops. As recommended by the IETF standard, RPL route recovery mechanisms in the event of a failure of a node should avoid loop, loop detection, DIO Poisoning. In this process, route recovery time and control message might be increased in the sub-tree because of the repeated route search. In this paper, we suggested RPL route recovery method to solve the routing overhead problem in the sub-tree during a loss of a link in the RPL routing protocol based on IoT wireless networks. The proposed method improved local repair process by utilizing a route that could not be selected as the preferred existing parents. This reduced the traffic control packet, especially in the disconnected node's sub tree. It also resulted in a quick recovery. Our simulation results showed that the proposed RPL local repair reduced the recovery time and the traffic of control packets of RPL. According to our experiment results, the proposed method improved the recovery performance of RPL.

A Low Noise Phase Locked Loop with Three Negative Feedback Loops (세 개의 부궤환 루프를 가진 저잡음 위상고정루프)

  • Young-Shig Choi
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.16 no.4
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    • pp.167-172
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    • 2023
  • A low-noise phase-locked loop(PLL) with three negative feedback loops has been proposed. It is not easy to improve noise characteristics with a conventional PLL. The added negative feedback loops reduce the input voltage magnitude of voltage controlled oscillator which determines the jitter characteristics, enabling the improvement of noise characteristics. Simulation results show that the jitter characteristics are improved as a negative feedback loop is added. In the case of power consumption, it slightly rises by about 10%, but jitter characteristics are improved by about two times. The proposed PLL was simulated with Hspice using a 1.8V 180nm CMOS process.

Design of Phase Locked Loop with Supply Noise Detector for Improving Noise Reduction (개선된 전원 잡음 제거를 위한 전원 전압 감지용 위상 고정 루프의 설계)

  • Choi, Hyek-Hwan;Choi, Young-Shig
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.9
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    • pp.2176-2182
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    • 2014
  • In this paper, a phase locked loop with suppressed power supply noise has been proposed. The added negative feedback loop of voltage controlled oscillator(VCO) and power noise detector suppresses the power noise induced jitter variation of VCO down to 1/3. The power noise detector is the modified circuit of frequency voltage converter. The proposed PLL has been designed based on a 1.8V 0.18um CMOS process and proved by HSPICE simulation.

Controller Design for Web Winding Process (웹재료의 와인딩 공정을 위한 제어기 설계)

  • 박기홍;허승진
    • Journal of the Korean Society for Precision Engineering
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    • v.20 no.5
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    • pp.99-107
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    • 2003
  • In a winding process, important control specifications include regulation of web tension and velocity. In this research, an adaptive controller has been developed for controlling web tension and velocity in winding processes. For the controller design, the linear quadratic regulator theory has been adopted and a gain-scheduling scheme has been incorporated. A prototype winding system has been constructed, and the controller has been implemented in a real-time PC-based environment. The performance of the closed loop system has been evaluated via simulation and experiments, and it was observed that both the web tension and velocity could be regulated within a small tolerance.

Visual Demonstration of Simulated Moving Bed (Simulated Moving Bed Chromatography의 시각적 설명)

  • Oh, Nan Suk;Lee, Chong-Ho;Kim, Jin Il;Koo, Yoon-Mo
    • Korean Chemical Engineering Research
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    • v.43 no.3
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    • pp.360-365
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    • 2005
  • SMB (simulated moving bed) is a continuous chromatographic process by shifting periodically port position. Binary of mixture, Blue dextran and Orange G, was separated by SMB. These components have unique color individually, that is, Blue dextran is blue and Orange G is orange. It is easy to understand SMB process by observing the shift of color changes in SMB. These components was not adsorbed to stationary phase and isolated by difference of size exclusion factor. Mass transfer coefficient was determined by single pulse test under several flow rate conditions. Operation condition was obtained by standing wave theory and optimized for high purities in extract and raffinate streams. Experiment was performed in open loop 4 zone (2-2-2-2) SMB. There are several advantages in open loop SMB, where extract is product for high purity. It is also easy to control flow rate and monitor experimental state during operation. Experimental, extract and raffinate history is well fitted with simulation results, however, column concentration profile is a little different from simulation results. Purities were 99.5% for extract and 98.9% for raffinate and extract and raffinate yields were obtained as 98.9% and 99.4% respectively.

Strengthening the Sustainability of the Nuclear Energy Policy System in Korea (원자력행정체제의 지속가능성 강화방안)

  • Choi, Young-Chool
    • Korean System Dynamics Review
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    • v.10 no.1
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    • pp.109-129
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    • 2009
  • This paper explores the ways by which the authority concerned with nuclear energy policy-making in Korea can strengthen its organisational sustainability from long-term perspective. In doing so, it applies the system dynamics approach to predict what would happen to the organisational sustainability of the nuclear energy authority in the future. In the process of analysis, it also draws causal loop map of components contained in the simulation model and constructs user-interface simulation model. It shows different predicted future values regarding organisational sustainability of the nuclear energy authority in Korea and puts forward some policy implications for practitioners and academics involved in nuclear energy policy.

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Mission Design and Analysis based on SEM Angle by Using Variable Coast During 3.5 Earth-Moon Phasing Loop Transfer (Variable Coast를 이용하는 3.5 지구-달 위상전이궤적에서 SEM 각도에 따른 임무설계 및 해석)

  • Choi, Su-Jin;Lee, Donghun;Lim, Seong-Bin;Choi, Suk-Won
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.46 no.1
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    • pp.68-77
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    • 2018
  • In order to analyze the overall characteristics of the lunar orbiter, the Variable Coast method, which can be launched everyday, is applied to the 3.5 phasing loop transfer trajectory. The mission scenario for the entire process from launching to entering the lunar orbit is set up and performed simulation by selecting the launch pad and launch vehicle. In particular, the SEM(Satellite-Earth-Moon) angle defined in Earth-Moon rotating frame is an important constraint to comprehensively evaluate the 3.5 phasing loop transfer trajectory. The simulation using SEM angle is analyzed from various viewpoints such as launch epoch, coast duration, perigee altitude and ${\Delta}V$ not only trans-lunar trajectory but lunar orbit insertions and the optimum SEM angle is suggested in this study. It is expected that this results will be helpful to evaluate the characteristics of the 3.5 phasing loop transfer trajectory according to the launch vehicle selection by comparison with Fixed Coast analysis results in the future.