• 한국조명전기설비학회지:조명전기설비
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• 제11권6호
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• pp.81-89
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• 1997

In order to achieve the zero voltage regulation of the output voltage, the function control law will be used. In the previous function control law, only the proportional controller is used and the stability of the closed loop system was not analyzed. In this paper, for the realization of the control law, a new method to retrieve the low frequency component of the inductor voltage is proposed and analyzed. The large signal closed loop characteristics are alos analyzed to ensure the stable operation of the system disturbances. By using the function control law in the control system, the effect of the disturbance of the supply voltage is reduced in 93.3% for the direct dusty ration method. Also, in the effect of the disturbance of the load current, the output voltage has a logn recovery-time and is changed proportionally in the direct duty ratio method, but has stable in the function control law. Finally, the analysis shows that the disturbance of the output voltage being due to the supply voltage variation can be eliminated completely and the closed loop output voltage is insensitive to the disturbance of the load current. Therefore, it is proved that by using the function control law, the switching power supply with zero-voltage regulation output voltage can be realized.

• 전기학회논문지P
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• 제64권2호
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• pp.79-84
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• 2015

Voltage sags are considered the dominant disturbances affecting power quality. Dynamic voltage restorers(DVRs) are mainly used to protect sensitive loads from the electrical network voltage disturbances such as sags or swells and could be used to reduce harmonic distortion of ac voltages. The typical DVR topology essentially contains a PWM inverter with LC Filter, an injection transformer connected between the ac voltage line and the sensitive load, and a DC energy storage device. For injecting series voltage, the PWM inverter is used and the passive filter consist of inductor(L) and capacitor(C) for harmonics elimination of the inverter. However there are voltage pulsation responses by the characteristic of the LC passive filter that eliminate the harmonics of the PWM output waveform of the inverter. Therefore, this paper presented design and feedback performance of LC filter used in the DVRs. The voltage control by LC filter should be connected in the line side since this feedback method allows a relatively faster dynamic response, enabling the elimination of voltage notches or spikes in the beginning and in the end of sags and strong load voltage THD reduction. Illustrative examples are also included.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 추계학술대회 논문집
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• pp.95-96
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• 2015

In this paper, a single-sourced PV PCS using the trinary asymmetric MLI with a single-ended pre-regulator is proposed. Trinary based asymmetric CHB inverters provide higher output levels for the same number of cells compared to other CHB inverters. However, there is an issue of regeneration with trinary asymmetric inverters and this complicates the system with requirement of bi-directional converters at the input. Modified commutation strategies have been used to remove the regeneration issue with compromise in THD. The single-ended pre-regulator provides the isolated dc-link voltage for the individual H-bridge cells with the advantage of having a single switch and magnetic component. This implementation increases the magnetic utilization of the inductor core and reduces the switching loss in the pre-regulator and also the reduced parts count contributes to the cost competiveness of the proposed PCS. The proposed PV PCS has been verified using simulation results in this paper.

• Journal of Magnetics
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• 제21권4호
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• pp.644-651
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• 2016

A novel zero voltage switching (ZVS) phase shift full bridge (PSFB) converter used in geophysical exploration is proposed in this paper. To extend the ZVS ranges and increase power density of the converter, external inductor acting as leakage inductance is applied and integrated into the integrated magnetic (IM) transformer with separated secondary winding. Moreover, the loss of ZVS PSFB converter is also decreased. Besides, the analysis and accurate prediction methodology of the leakage inductance of the IM transformer are proposed, which are based on magnetic energy and Lebedev. Finally, to verify the accuracy of analysis and methodology, the experimental and finite element analysis (FEA) results of IM transformer and 40 kW converter prototypes are given.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.372-373
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• 2019

본 논문은 다중 권선 결합 인덕터를 이용한 능동 셀 밸런싱 회로의 밸런싱 속도를 향상시킬 수 있는 새로운 동작 모드를 제안한다. 다중 권선 결합 인덕터를 사용한 능동 셀 밸런싱 회로는 두 셀이 하나의 결합 인덕터 권선을 공유하며, 셀과 결합 인덕터 사이의 연결을 제어하기 위해 셀당 하나의 스위치가 사용된다. 이 회로는 비교적 높은 전압을 갖는 소스 셀에 저장된 에너지를 결합 인덕터에 저장한 뒤, 그 에너지를 목표 셀로 전달하는 방식으로 셀 밸런싱을 수행한다. 하지만, 회로 구조상서로 다른 권선을 공유하고, 동일한 위치에 연결된 셀 간 밸런싱을 수행할 경우, 두 번의 에너지 전달 과정을 통해 목표 셀로 에너지가 전달 되게 된다. 이는 에너지 전달 경로를 증가시키므로 회로의 효율과 셀 밸런싱 속도를 크게 저하시킨다. 본 논문은 위의 셀 조건에서 에너지 전달 경로를 단축시켜 셀 밸런싱 속도를 향상시킬 수 있는 새로운 동작 모드를 제안한다. 새로운 동작 모드 성능은 15W급 시작품을 이용하여 검증되었다.

• 한국정보통신학회논문지
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• 제24권2호
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• pp.325-328
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• 2020

This paper demonstrated a voltage-controlled oscillator (VCO) using cost-effective (1-poly 6-metal) mixed signal standard CMOS process. To have the high-quality factor inductor in LC resonator with thin metal thickness, patterned-ground shields (PGS) was adopted under the spiral to effectively reduce the ac current of low resistive Si substrate. And, because of thin top-metal compared with that of RF option (2 ㎛), we make electrically connect between the top metal (M6) and the next metal (M5) by great number of via array along the metal traces. The circuit operated from 2.48 GHz to 2.62 GHz tuned by accumulation-mode varactor device. And the measured phase noise of LC VCO has -123.7 dBc/Hz at 1MHz offset at 2.62 GHz and the dc-power consumption shows 2.07 mW with 1.8V supply voltage, respectively.

• 디지털산업정보학회논문지
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• 제20권2호
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• pp.63-74
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• 2024

This Paper presents a resistive wideband fully differential low-noise amplifier (LNA) designed using a noise-cancellation technique for TV tuner applications. The front-end of the LNA employs a cascode common-gate (CG) configuration, and cross-coupled local feedback is employed between the CG and common-source (CS) stages. The moderate gain at the source of the cascode transistor in the CS stage is utilized to boost the transconductance of the cascode CG stage. This produces higher gain and lower noise figure (NF) than a conventional LNA with inductor. The NF can be further optimized by adjusting the local open-loop gain, thereby distributing the power consumption among the transistors and resistors. Finally, an optimized DC gain is obtained by designing the output resistive network. The proposed LNA, designed in SK Hynix 180 nm CMOS, exhibits improved linearity with a voltage gain of 10.7 dB, and minimum NF of 1.6-1.9 dB over a signal bandwidth of 40 MHz to 1 GHz.

• ETRI Journal
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• 제46권4호
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• pp.708-715
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• 2024

We propose a 10-GHz 2 × 2 phased-array radio frequency (RF) receiver with an 8-bit linear phase and 15-dB gain control range using 65-nm complementary metal-oxide-semiconductor technology. An 8 × 8 phased-array receiver module is implemented using 16 2 × 2 RF phased-array integrated circuits. The receiver chip has four single-to-differential low-noise amplifier and gain-controlled phase-shifter (GCPS) channels, four channel combiners, and a 50-Ω driver. Using a novel complementary bias technique in a phase-shifting core circuit and an equivalent resistance-controlled resistor-inductor-capacitor load, the GCPS based on vector-sum structure increases the phase resolution with weighting-factor controllability, enabling the vector-sum phase-shifting circuit to require a low current and small area due to its small 1.2-V supply. The 2 × 2 phased-array RF receiver chip has a power gain of 21 dB per channel and a 5.7-dB maximum single-channel noise-figure gain. The chip shows 8-bit phase states with a 2.39° root mean-square (RMS) phase error and a 0.4-dB RMS gain error with a 15-dB gain control range for a 2.5° RMS phase error over the 10 to10.5-GHz band.

• 한국항공우주학회지
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• 제41권1호
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• pp.79-84
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• 2013

DC/DC 컨버터는 임의의 직류전원을 부하가 요구하는 형태의 직류전원으로 변환시키는 효율이 높은 전력변환기이다. DC/DC 컨버터는 PWM-IC(펄스폭 변조 집적회로) 제어기, MOSFET(산화물-반도체 전계 효과 트랜지스터), 인덕터, 콘덴서 등으로 구성되어있다. 코발트 60 ($^{60}Co$) 저준위 감마발생기를 이용한 TID실험에서 방사선의 영향으로 PWM-IC의 전기적 특성중에 문턱전압과 옵셋전압이 증가되고, SEL에 적용된 4종류의 중이온 입자는 PWM-IC의 파형을 불안정하게 만든다. 또한, 입/출력관계의 파형을 SPICE 시뮬레이션 프로그램으로 관찰하였다. PWM-IC의 TID 실험은 30 Krad 까지 수행하였으며, SEL 실험을 제어보드를 구현한 후 LET($MeV/mg/cm^2$)별 cross section($cm^2$)으로 연구하였다.

• 스마트미디어저널
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• 제4권2호
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• pp.55-61
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• 2015

A bandwidth-enhanced ultra-wide band (UWB) CMOS balun-LNA is implemented as a part of a software defined radio (SDR) receiver which supports multi-band and multi-standard. The proposed balun-LNA is composed of a single-to-differential converter, a differential-to-single voltage summer with inductive shunt peaking, a negative feedback network, and a differential output buffer with composite common-drain (CD) and common-source (CS) amplifiers. By feeding the single-ended output of the voltage summer to the input of the LNA through a feedback network, a wideband balun-LNA exploiting negative feedback is implemented. By adopting a source follower-based inductive shunt peaking, the proposed balun-LNA achieves a wider gain bandwidth. Two LNA design examples are presented to demonstrate the usefulness of the proposed approach. The LNA I adopts the CS amplifier with a common gate common source (CGCS) balun load as the S-to-D converter for high gain and low noise figure (NF) and the LNA II uses the differential amplifier with the ac-grounded second input terminal as the S-to-D converter for high second-order input-referred intercept point (IIP2). The 3 dB gain bandwidth of the proposed balun-LNA (LNA I) is above 5 GHz and the NF is below 4 dB from 100 MHz to 5 GHz. An average power gain of 18 dB and an IIP3 of -8 ~ -2 dBm are obtained. In simulation, IIP2 of the LNA II is at least 5 dB higher than that of the LNA I with same power consumption.