• Title/Summary/Keyword: power dissipation

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Coastal-physical cceanographic aspects in relation to the tidal current power generation in the Uldolmok (울돌목 조류발전의 연안물리적 관점에서의 고찰)

  • Kang Sok Kuh;Yum Ki-Dai;Lee Kwang Soo;Park Jin Soon
    • New & Renewable Energy
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    • v.1 no.2 s.2
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    • pp.73-78
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    • 2005
  • The pilot tidal current power plant is to be constructed at the Uldolmok between Chindo and Haenam, during next year, and extensive coastal engineering research works have been carried out. In this paper we describes some observation results of the tide and tidal current, as well as modeling work in order to investigate the tide and tidal current regime change In relation to the tidal current power plant [TCPP] construction. The special modeling skill in order to consider the turbine operation in the TCPP is developed and applied to the estimation for the flow regime change by the simple layout of the tidal current power plant.

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A Braking Algorithm of a PM synchronous Motor (영구자석 동기전동기의 제동 알고리듬)

  • 조관열;양순배;홍찬희
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.4
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    • pp.313-321
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    • 2002
  • A braking algorithm for a PM synchronous motor is presented. The resistance of the stator windings operates as a braking resistors and dissipates the regenerated power from the rotor without any braking components including the electronic power components and control circuits. The proposed braking algorithm maximizes the power dissipation in the stator windings and also generates the maximum braking torque under the limit conditions of DC link capacitor voltage and inverter currents so that it can minimize the braking time.

Low power high level synthesis by increasing data correlation (데이타 상관 증가에 의한 저전력 상위 수준 합성)

  • 신동완;최기영
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.5
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    • pp.1-17
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    • 1997
  • With the increasing performance and density of VLSI scircuits as well as the popularity of portable devices such as personal digital assitance, power consumption has emerged as an important issue in the design of electronic systems. Low power design techniqeus have been pursued at all design levels. However, it is more effective to attempt to reduce power dissipation at higher levels of abstraction which allow wider view. In this paper, we propose a simultaneous scheduling and binding scheme which increases the correlation between cosecutive inputs to an operation so that the switched capacitance of execution units is reduced in datapath-dominated circuits. The proposed method is implemented and integrated into the scheduling and assignment part of HYPER synthesis environment. Compared with original HYPER synthesis system, average power saving of 23.0% in execution units and 14.2% in the whole circuits, ar eobtained for a set of benchmark examples.

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Test Scheduling for System-on-Chips using Test Resources Grouping (테스트 자원 그룹화를 이용한 시스템 온 칩의 테스트 스케줄링)

  • Park, Jin-Sung;Lee, Jae-Min
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.257-263
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    • 2002
  • Test scheduling of SoC becomes more important because it is one of the prime methods to minimize the testing time under limited power consumption of SoCs. In this paper, a heuristic algorithm, in which test resources are selected for groups and arranged based on the size of product of power dissipation and test time together with total power consumption in core-based SoCs is proposed. We select test resource groups which has maximum power consumption but does not exceed the constrained power consumption and make the testing time slot of resources in the test resource group to be aligned at the initial position to minimize the idle test time of test resources.

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Inner Evaporative Cooling Wind Power Generator with Non-overlapping Concentrated Windings

  • Li, Wang;Wang, Haifeng
    • Journal of international Conference on Electrical Machines and Systems
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    • v.3 no.1
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    • pp.15-19
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    • 2014
  • As the space of the wind power generator stator end is limited, it is difficult for us to place the inner evaporative cooling system in it. We use the non-overlapping concentrated windings scheme to solve the placing and cooling problem. The characteristic of a 5MW direct-driven permanent magnet generator with non-overlapping concentrated windings were analyzed under no-load, rating-load and short-circuit by (Finite Element Method) FEM for verification of design. We studied the connection methods of the stator windings and designed the end connection member. The heat dissipation of the stator end was simulated by FEM, the result showed that the end cooling could satisfy the wind generator operation needs. These results show that the direct-driven permanent magnet wind power generators with non-overlapping concentrated windings and inner evaporative cooling system can solve the cooling problem of wind power generator, and obtain good performance at the same time.

High Heat Dissipation and High Power Density Modular Buck Converter Based GaN-FET (GaN-FET를 적용한 고방열 및 고전력밀도 모듈형 벅 컨버터)

  • Kim, Sung-Kwon;Yang, Jung-woo;Choi, Yun-Hwa;Kim, Ku-Yong;Han, Sang-Kyoo
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.96-97
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    • 2017
  • 본 논문은 Gallium Nitride-Field Effect Transistor(GaN-FET)를 적용한 고방열 및 고전력밀도 모듈형 벅 컨버터를 제안한다. Si-MOSFET를 적용한 벅 컨버터는 높은 스위칭 손실로 인해 고주파수 구동 및 자기소자 사이즈 저감에 한계가 존재하여 고전력밀도화가 어렵다. 반면, 제안된 방식은 스위칭 특성이 우수한 GaN-FET를 적용하여 고주파수 구동이 가능하며, 추가로 평면형 인덕터를 적용함으로써 자기소자의 부피 저감을 통해 컨버터의 고전력밀도화 및 모듈화가 가능하다. 특히, 방열 플레이트 및 케이스로 구성된 새로운 고방열 구조를 통해 방열효과를 극대화 시킬 수 있다. 제안된 모듈형 벅 컨버터의 타당성 검증을 위해 입력전압 48V, 출력전압 24V의 300W급 시작품 제작을 통한 실험결과를 제시한다.

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Power Module Packaging Technology with Extended Reliability for Electric Vehicle Applications (전기자동차용 고신뢰성 파워모듈 패키징 기술)

  • Yoon, Jeong-Won;Bang, Jung-Hwan;Ko, Yong-Ho;Yoo, Se-Hoon;Kim, Jun-Ki;Lee, Chang-Woo
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.4
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    • pp.1-13
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    • 2014
  • The paper gives an overview of the concepts, basic requirements, and trends regarding packaging technologies of power modules in hybrid (HEV) and electric vehicles (EV). Power electronics is gaining more and more importance in the automotive sector due to the slow but steady progress of introducing partially or even fully electric powered vehicles. The demands for power electronic devices and systems are manifold, and concerns besides aspects such as energy efficiency, cooling and costs especially robustness and lifetime issues. Higher operation temperatures and the current density increase of new IGBT (Insulated Gate Bipolar Transistor) generations make it more and more complicated to meet the quality requirements for power electronic modules. Especially the increasing heat dissipation inside the silicon (Si) leads to maximum operation temperatures of nearly $200^{\circ}C$. As a result new packaging technologies are needed to face the demands of power modules in the future. Wide-band gap (WBG) semiconductors such as silicon carbide (SiC) or gallium nitride (GaN) have the potential to considerably enhance the energy efficiency and to reduce the weight of power electronic systems in EVs due to their improved electrical and thermal properties in comparison to Si based solutions. In this paper, we will introduce various package materials, advanced packaging technologies, heat dissipation and thermal management of advanced power modules with extended reliability for EV applications. In addition, SiC and GaN based WBG power modules will be introduced.

Development of the High Input Voltage Self-Power for LVDC

  • Kim, Kuk-Hyeon;Kim, Soo-Yeon;Choi, Eun-Kyung;HwangBo, Chan;Park, Seong-Mi;Park, Sung-Jun
    • Journal of the Korean Society of Industry Convergence
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    • v.24 no.4_1
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    • pp.387-395
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    • 2021
  • Distributed resources such as renewable energy sources and ESS are connected to the low voltage direct current(LVDC) distribution network through the power conversion system(PCS). Control power is required for the operation of the PCS. In general, controller power is supplied from AC power or DC power through switch mode power supply(SMPS). However, the conventional SMPS has a low input voltage, so development and research on high input voltage self-power suitable for LVDC is insufficient. In this paper, to develop Self-Power that can be used for LVDC, the characteristics of the conventional topology are analyzed, and a series-input single-output flyback converter using a flux-sharing transformer for high voltage is designed. The high input voltage Self-Power was designed in the DCM(discontinuous current mode) to reduce the switching loss and solve the problem of current dissipation. In addition, since it operates even at low input voltage, it can be applied to many applications as well as LVDC. The validity of the proposed high input voltage self-power is verified through experiments.

低電力 MCU core의 設計에 對해

  • An, Hyeong-Geun;Jeong, Bong-Yeong;No, Hyeong-Rae
    • The Magazine of the IEIE
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    • v.25 no.5
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    • pp.31-41
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    • 1998
  • With the advent of portable electronic systems, power consumption has recently become a major issue in circuit and system design. Furthermore, the sophisticated fabrication technology makes it possible to embed more functions and features in a VLSI chip, consequently calling for both higher performance and lower power to deal with the ever growing complexity of system algorithms than in the past. VLSI designers should cope with two conflicting constraints, high performance and low power, offering an optimum trade off of these constraints to meet requirements of system. Historically, VLSI designers have focused on performance improvement, and power dissipation was not a design criteria but an afterthought. This design paradigm should be changed, as power is emerging as the most critical design constraint. In VLSI design, low power design can be accomplished through many ways, for instance, process, circuit/logic design, architectural design, and etc.. In this paper, a few low power design examples, which have been used in 8 bit micro-controller core, and can be used also in 4/16/32 bit micro-controller cores, are presented in the areas of circuit, logic and architectural design. We first propose a low power guidelines for micro-controller design in SAMSUNG, and more detailed design examples are followed applying 4 specific design guidelines. The 1st example shows the power reduction through reduction of number of state clocks per instruction. The 2nd example realized the power reduction by applying RISC(Reduced Instruction Set Computer) concept. The 3rd example is to optimize the algorithm for ALU(Arithmetic Logic Unit) to lower the power consumption, Lastly, circuit cells designed for low power are described.

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Design of Low-Power Digital Matched Filter for IMT-2000 system (IMT-2000용 저전력 디지털 정합 필터의 설계)

  • Park Ki Hyun;Ha Jin Suk;Lee Kwang Yeob;Cha Jae Sang
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.31-34
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    • 2004
  • In wireless communication systems, low-power metrics is becoming a burdensome problem in the portable terminal design, because of portability constraints. This paper presents design architecture of a low-power partial correlation Digital Matched Filter for the IMT-2000 communication systems. The proposed approach focuses on efficient circuit size, power dissipation, maintaining the operating throughput. The proposed architecture was verified by using Xilinx FPGA.

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