• Title/Summary/Keyword: power clamp

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The Design of SCR-based Whole-Chip ESD Protection with Dual-Direction and High Holding Voltage (양 방향성과 높은 홀딩전압을 갖는 사이리스터 기반 Whole-Chip ESD 보호회로)

  • Song, Bo-Bae;Han, Jung-Woo;Nam, Jong-Ho;Choi, Yong-Nam;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.17 no.3
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    • pp.378-384
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    • 2013
  • We have investigated the electrical characteristics of SCR(Silicon Controlled Rectifier)-based ESD power clamp circuit with high holding voltage and dual-directional ESD protection cells for a whole-chip ESD protection. The measurement results indicate that the dimension of n/p-well and p-drift has a great effect on holding voltage (2V-5V). Also A dual-directional ESD protection circuit is designed for I/O ESD protection application. The trigger voltage and the holding voltage are measured to 5V and 3V respectively. In comparison with typical ESD protection schemes for whole-chip ESD protection, this ESD protection device can provide an effective protection for ICs against ESD pulses in the two opposite directions, so this design scheme for whole-chip ESD protection can be discharged in ESD-stress mode (PD, ND, PS, NS) as well as VDD-VSS mode. Finally, a whole-chip ESD protection can be applied to 2.5~3.3V VDD applications. The robustness of the novel ESD protection cells are measured to HBM 8kV and MM 400V.