• Title/Summary/Keyword: power MOSFET

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A 300 GHz Imaging Detector and Image Acquisition Based on 65-nm CMOS Technology (65-nm CMOS 300 GHz 영상 검출기 및 영상 획득)

  • Yoon, Daekeun;Song, Kiryong;Rieh, Jae-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.7
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    • pp.791-794
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    • 2014
  • In this work, a 300 GHz imaging detector has been developed and image has been acquired in a 65-nm CMOS technology. The circuit was designed based on the square-law of MOSFET devices. The fabricated detector exhibits a maximum responsivity of 2,270 V/W and minimum NEP of $38pW/Hz^{1/2}$ at 285 GHz, and NEP< ${\sim}200pW/Hz^{1/2}$ for 250~305 GHz range. The chip size is $400{\mu}m{\times}450{\mu}m$ including the probing pads and a balun, while the core of the circuit occupies only $150{\mu}m{\times}100{\mu}m$.

Prototype Development of 3-Phase 3.3kV/220V 6kVA Modular Semiconductor Transformer (3상 3.3kV/220V 6kVA 모듈형 반도체 변압기의 프로토타입 개발)

  • Kim, Jae-Hyuk;Kim, Do-Hyun;Lee, Byung-Kwon;Han, Byung-Moon;Lee, Jun-Young;Choi, Nam-Sup
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.12
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    • pp.1678-1687
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    • 2013
  • This paper describes a prototype of 3-phase 3.3kV/220V 6kVA modular semiconductor transformer developed in the lab for feasibility study. The developed prototype is composed of three single-phase units coupled in Y-connection. Each single-phase unit with a rating of 1.9kV/127V 2kVA consists of a high-voltage high-frequency resonant AC-DC converter, a low-voltage hybrid-switching DC-DC converter, and a low-voltage hybrid-switching DC-AC converter. Also each single-phase unit has two DSP controllers to control converter operation and to acquire monitoring data. Monitoring system was developed based on LabView by using CAN communication link between the DSP controller and PC. Through various experimental analyses it was verified that the prototype operates with proper performance under normal and sag condition. The system efficiency can be improved by adopting optimal design and replacing the IGBT switch with the SiC MOSFET switch. The developed prototype confirms a possibility to build a commercial high-voltage high-power semiconductor transformer by increasing the number of series-connected converter modules in high-voltage side and improving the performance of switching element.

Performance and Variation-Immunity Benefits of Segmented-Channel MOSFETs (SegFETs) Using HfO2 or SiO2 Trench Isolation

  • Nam, Hyohyun;Park, Seulki;Shin, Changhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.427-435
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    • 2014
  • Segmented-channel MOSFETs (SegFETs) can achieve both good performance and variation robustness through the use of $HfO_2$ (a high-k material) to create the shallow trench isolation (STI) region and the very shallow trench isolation (VSTI) region in them. SegFETs with both an HTI region and a VSTI region (i.e., the STI region is filled with $HfO_2$, and the VSTI region is filled with $SiO_2$) can meet the device specifications for high-performance (HP) applications, whereas SegFETs with both an STI region and a VHTI region (i.e., the VSTI region is filled with $HfO_2$, and the STI region is filled with $SiO_2$) are best suited to low-standby power applications. AC analysis shows that the total capacitance of the gate ($C_{gg}$) is strongly affected by the materials in the STI and VSTI regions because of the fringing electric-field effect. This implies that the highest $C_{gg}$ value can be obtained in an HTI/VHTI SegFET. Lastly, the three-dimensional TCAD simulation results with three different random variation sources [e.g., line-edge roughness (LER), random dopant fluctuation (RDF), and work-function variation (WFV)] show that there is no significant dependence on the materials used in the STI or VSTI regions, because of the predominance of the WFV.

Design of the Noise Margin Improved High Voltage Gate Driver IC for 300W Resonant Half-Bridge Converter (잡음 내성이 향상된 300W 공진형 하프-브리지 컨버터용 고전압 구동 IC 설계)

  • Song, Ki-Nam;Park, Hyun-Il;Lee, Yong-An;Kim, Hyoung-Woo;Kim, Ki-Hyun;Seo, Kil-Soo;Han, Seok-Bung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.10
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    • pp.7-14
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    • 2008
  • In this paper, we designed the HVIC(High Voltage Gate Driver IC) which has improved noise immunity characteristics and high driving capability. Operating frequency and input voltage range of the designed HVIC is up to 500kHz and 650V, respectively. Noise protection and schmitt trigger circuit is included in the high-side level shifter of designed IC which has very high dv/dt noise immunity characteristic(up to 50V/ns). And also, rower dissipation of high-side level shifter with designed short-pulse generation circuit decreased more that 40% compare with conventional circuit. In addition, designed HVIC includes protection and UVLO circuit to prevent cross-conduction of power switch and sense power supply voltage of driving section, respectively. Protection and UVLO circuit can improve the stability of the designed HVIC. Spectre and Pspice circuit simulator were used to verify the operating characteristics of the designed HVIC.

Mixed-mode simulation of transient characteristics of 4H-SiC DMOSFETs - Impact off the interface changes (Mixde-mode simulation을 이용한 4H-SiC DMOSFETs의 계면상태에서 포획된 전하에 따른 transient 특성 분석)

  • Kang, Min-Seok;Choe, Chang-Yong;Bang, Wook;Kim, Sang-Chul;Kim, Nam-Kyun;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.55-55
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    • 2009
  • Silicon Carbide (SiC) is a material with a wide bandgap (3.26eV), a high critical electric field (~2.3MV/cm), a and a high bulk electron mobility (${\sim}900cm^2/Vs$). These electronic properties allow high breakdown voltage, high frequency, and high temperature operation compared to Silicon devices. Although various SiC DMOSFET structures have been reported so far for optimizing performances. the effect of channel dimension on the switching performance of SiC DMOSFETs has not been extensively examined. In this paper, we report the effect of the interface states ($Q_s$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized and a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. has been used to understand the relationship with the switching characteristics. To investigate transient characteristic of the device, mixed-mode simulation has been performed, where the solution of the basic transport equations for the 2-D device structures is directly embedded into the solution procedure for the circuit equations. The result is a low-loss transient characteristic at low $Q_s$. Based on the simulation results, the DMOSFETs exhibit the turn-on time of 10ns at short channel and 9ns at without the interface charges. By reducing $SiO_2/SiC$ interface charge, power losses and switching time also decreases, primarily due to the lowered channel mobilities. As high density interface states can result in increased carrier trapping, or recombination centers or scattering sites. Therefore, the quality of $SiO_2/SiC$ interfaces is important for both static and transient properties of SiC MOSFET devices.

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