• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.3
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• pp.139-144
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• 2003

A flat type micro gas sensor was fabricated on the p-type silicon wafer with low stress Si$_3$N$_4$, whose thickness is 2 ${\mu}{\textrm}{m}$, using MEMS technology. WO$_3$ thin film as a sensing material for detection of NO$_2$ gas was deposited using a tungsten target by sputtering method, followed by thermal oxidation at several temperatures (40$0^{\circ}C$-$600^{\circ}C$) for one hour. NO$_2$ sensitivities were investigated for the WO$_3$ thin films with different annealing temperatures. The highest sensitivity was obtained for the samples annealed at $600^{\circ}C$ when it was operated at 20$0^{\circ}C$. The results of XRD analysis showed the annealed samples had polycrystalline phase mixed with triclinic and orthorhombic structures. The sample exhibits higher sensitivity when the system has less triclinic structure. The sensitivities, $R_{gas}/R_{air},$ operating at 20$0^{\circ}C$ to 5 ppm NO$_2$ of the sample annealed at $600^{\circ}C$ were approximately 90.

• Applied Science and Convergence Technology
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• v.26 no.2
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• pp.26-29
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• 2017

Thin films of europium-doped yttrium oxide ($Y_2O_3$:Eu) were prepared on Si (100) substrates by using a radio frequency (RF) magnetron sputtering. After the deposition, the films were annealed at $1000^{\circ}C$ in an air ambient for 1 hour. X-ray diffraction analysis revealed that the $Y_2O_3$:Eu films had a polycrystalline cubic ${\alpha}-Y_2O_3$ structure. The as-deposited films showed no photoluminescence (PL), which was due to poor crystalline quality of the films. The crystallinity of the $Y_2O_3$:Eu films was significantly improved by annealing. The strong red PL emission was observed from the annealed $Y_2O_3$:Eu films and the highest intensity peak was centered at around 613 nm. This emission peak originated from the $^5D_0{\rightarrow}^7F_2$ transition of the trivalent Eu ions occupying the $C_2$ sites in the cubic ${\alpha}-Y_2O_3$ lattice. The broad PL excitation band was observed at wavelengths below 280 nm, which was attributed to the charge transfer transition of the trivalent Eu ion.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.70-70
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• 2003

금속용액을 이용하여 측면고상결정화 시킨 다결정 실리콘 박막내의 고각입계를 줄이기 위해 서 고온열처리를 실시하였다. SEM과 TEM을 이용하여 다결정 실리콘내의 바늘모양의 결정립의 폭의 증가를 관찰하였고, 결정 립내의 결함이 감소를 관찰하였다. 그리고 결정화된 다결정 실리콘의 표면 거칠기를 AFM이용하여 퍼니스에서 53$0^{\circ}C$에서 25시간 동안 결정화 시킨 시편과 이후 80$0^{\circ}C$에서 40분간 추가 고온 열처리시킨 시편을 비교한 결과 6.09$\AA$에서 4.22$\AA$으로 개선되었음을 확인할 수 있었다. 박막내의 금속에 의한 오염을 줄이기 위해 금속의 농도를 줄인 금속용액을 결정화에 사용하였다. 이때 저농도 금속용액을 사용하여 측면결정화시킨 다결정 실리콘 박막내의 소각입계를 이루는 결정립군의 크기가 고농도 금속용액을 이용하여 측면결정화시킨 경우보다 증가함을 확인 할 수 있었다. 박막트랜지스터를 제작하여 트랜지스터의 전기적특성을 살펴보았다. 전계이동도가 80$0^{\circ}C$ 고온 열처리에 의해서 53$\textrm{cm}^2$/Vsec 에서 95$\textrm{cm}^2$/Vsec 로 상승하였는데 이는 고온열처리에 의해서 측면결정화된 다결정 실리콘내의 트랩 밀도가 2.2$\times$$10^{12}$/$\textrm{cm}^2$ 에서 1.3$\times$$10^{12}$$\textrm{cm}^2$로 감소하였기 때문이다.

• Korean Journal of Materials Research
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• v.24 no.9
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• pp.443-450
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• 2014

Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide which can enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was then prepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a $NiCl_2$ environment. After removing surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemical vapor deposition at $200^{\circ}C$. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing (RTA) process at $730^{\circ}C$ for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as the crystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer was epitaxially crystallized with the help of $NiSi_2$ precipitates that originated from the poly-Si seed layer. The crystallinity of the SERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process. The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to $1{\times}10^{18}cm^{-3}$. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by the SERTA process were $85cm^2/V{\cdot}s$ and 1.23 V/decade at $V_{ds}=-3V$, respectively. The off current was little increased under reverse bias from $1.0{\times}10^{-11}$ A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakage current can be fabricated with more precise experiments.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.3
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• pp.223-227
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• 2007

The effect of Eu contents on the ferroelectric properties of $Bi_{4-x}Eu_xTi_3 O_{12}$ (BET) thin films has been investigated. Bismuth Europium titanate thin films with a Eu contents were prepared on the $Pt/Ti/SiO_2/Si$ substrate by metal-organic decomposition technique. The structure and the morphology of the films were analyzed using X-ray diffraction (XRD) and field emission scanning microscopy (FE-SEM), respectively. From the XRD analysis, it was found that BET thin films have polycrystalline structure, and the layered-perovskite phase is obtained when the Eu contents exceeds 0.2 (x > 0.2). Also, the ferroelectric characteristics of the BET thin films were found to be dependent on the Eu content. Particularly, the BET films doped with x = 0.75 show better ferroelectric properties (remanent polarization 2Pr = 60.99 C/$cm^2$ and only a little polarization fatigue up to $3.5{\times}10^9$ bipolar switching cycling) than those doped with other Eu contents.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.3
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• pp.279-284
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• 2014

This paper proposes a novel OLED pixel circuit to compensate the threshold voltage variation of p-channel low temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The proposed 5-TFT OLED pixel circuit consists of 4 switching TFTs, 1 OLED driving TFT and 1 capacitor. One frame of the proposed pixel circuit is divided into initialization period, threshold voltage sensing and data programming period, data holding period and emission period. SmartSpice simulation results show that the maximum error rate of OLED current is -4.06% when the threshold voltage of driving TFT varies by ${\pm}0.25V$ and that of OLED current is 9.74% when the threshold voltage of driving TFT varies by ${\pm}0.50V$. Thus, the proposed 5T1C pixel circuit can realize uniform OLED current with high immunity to the threshold voltage variation of p-channel poly-Si TFT.

• Korean Journal of Crystallography
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• v.11 no.2
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• pp.95-101
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• 2000

Ferroelectric SrBi2Ta2O9 (SBT) thin films of Pt/Ti/SiO2 electrode were fabricated using a sintered SBT target with various Bi2O3 content by rf magnetron sputtering. Good hysteresis loop characteristics were observed in the SBT thin films deposited with 50mol% excess Bi target. SBT thin films crystallized from 650℃ however, good hysteresis loop can be obtained in the film annealed above 700℃. pt/TiO2/SiO2 and Pt/SiO2 electrodes were also used to investigate the Pt electrode dependence of SBT thin films. SBT thin films showed random oriented polycrystalline structure and similar morphology regardless of electrodes with quite different surface morphology. A 0.2㎛ thick SBT film annealed at 750℃ exhibited the remanent polarization (2Pr) of μC/㎠ and coercive voltage(Vc) of 1V at an applied voltage of 5V.

• Current Photovoltaic Research
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• v.2 no.1
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• pp.1-7
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• 2014

We developed a method of growing thin Si film at $600^{\circ}C$ by hot wire CVD using a very thin large-grained poly-Si seed layer for thin-film Si solar cells. The seed layer was prepared by crystallizing an amorphous Si film by vapor-induced crystallization using $AlCl_3$ vapor. The average grain size of the p-type epitaxial Si layer was about $20{\mu}m$ and crystallographic defects in the epitaxial layer were mainly low-angle grain boundaries and coincident-site lattice boundaries, which are special boundaries with less electrical activity. Moreover, with a decreasing in-situ boron doping time, the mis-orientation angle between grain boundaries and in-grain defects in epitaxial Si decreased. Due to fewer defects, the epitaxial Si film was high quality evidenced from Raman and TEM analysis. The highest mobility of $360cm^2/V{\cdot}s$ was achieved by decreasing the in-situ boron doping time. The performance of our preliminary thin-film solar cells with a single-side HIT structure and $CoSi_2$ back contact was poor. However, the result showed that the epitaxial Si film has considerable potential for improved performance with a reduced boron doping concentration.

• Korean Journal of Materials Research
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• v.24 no.1
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• pp.19-24
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• 2014

We report the nitrogen monoxide (NO) gas sensing properties of p-type CuO-nanorod-based gas sensors. We synthesized the p-type CuO nanorods with breadth of about 30 nm and length of about 330 nm by a hydrothermal method using an as-deposited CuO seed layer prepared on a $Si/SiO_2$ substrate by the sputtering method. We fabricated polycrystalline CuO nanorod arrays at $80^{\circ}C$ under the hydrothermal condition of 1:1 morality ratio between copper nitrate trihydrate [$Cu(NO_2)_2{\cdot}3H_2O$] and hexamethylenetetramine ($C_6H_{12}N_4$). Structural characterizations revealed that we prepared the pure CuO nanorod array of a monoclinic crystalline structure without any obvious formation of secondary phase. It was found from the gas sensing measurements that the p-type CuO nanorod gas sensors exhibited a maximum sensitivity to NO gas in dry air at an operating temperature as low as $200^{\circ}C$. We also found that these CuO nanorod gas sensors showed reversible and reliable electrical response to NO gas at a range of operating temperatures. These results would indicate some potential applications of the p-type semiconductor CuO nanorods as promising sensing materials for gas sensors, including various types of p-n junction gas sensors.