• Transactions of the Korean Society of Mechanical Engineers B
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• v.20 no.3
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• pp.1106-1113
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• 1996

The phase criterion of the feedback cycle of low-speed edgetones has been obtained using the jet-edge interaction model which is based on the substitution of an array of dipoles for the reaction of the wedge to the impinging jet. The edgetone is produced by the feedback loop between the downstream-convected sinuous disturbance and upstream-propagating waves generated by the impingement of the disturbance on the wedge. By estimation of the phase difference between the downstream and the upstream disturbances, the relationship between the edge distance and the wavelength is obtained according to the phase-locking condition at the nozzle lip. With a little variation depending on the characteristics of jet-edge interaction, the criterion can be approximated as follows: h/.LAMBDA. + h/.lambda. = n - 1/4, where h is the stand-off distance between the nozzle lip and the edge tip, .LAMBDA. is the wavelength of downstream-convected wave, .lambda. is the wavelength of the upstream-propagating acoustic wave and n is the stage number for the ladder-like characteristics of frequency. The present criterion has been confirmed by estimating wavelengths from available experimental data and investigating their appropriateness. The above criterion has been found to be effective up to 90.deg. of wedge angle corresponding to the cavitytones.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.6
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• pp.1153-1157
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• 2004

This paper describes a new programmable DLL_based frequency synthesizer. Generally, PLLs have been used for frequency synthesis. Inherent fast locking DLLs are also used for frequency synthesis. However, DLL needs a frequency multiplier for various frequencies. A conventional frequency multiplier used in DLL has a restriction in which a multiple is fixed. However, the proposed DLL can generate clocks which are from 6 times to 10 times of the reference clock. Frequency range of the proposed DLL is from 600MHz to 1GHz. The idea has been confirmed by HSPICE simulations in a $0.35-\mu\textrm{m}$ CMOS process.

• The Journal of Korean Association of Computer Education
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• v.11 no.4
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• pp.71-83
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• 2008

The recent advances of the information technology have motivated lots of research efforts to develop new computer-aided teaching and learning methodologies on various computer science topics, such as data structures, operating system, computer networks, and computer architecture. However, there have been only few studies to educate the database subject although it is one of the most important topics in the computer science. Specifically, among the various issues in the database subject, a learner often suffers to understand the mechanism of the concurrency control and recovery of database transaction in the database because it highly interacts with other functions in the database. Obviously, an intelligent visualization tool can help a learner to understand the process of the concurrency control and the recovery of database transaction. The purpose of this study is to develop an efficient visualization tool which can help users understand the two phase locking protocol (2PLP)-based concurrency control. Specifically, this visualization tool is designed to encourage a users' participation and raise their interest by visualizing the process of transactions and allowing users to specify and manipulate their own transactions.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.8
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• pp.717-724
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• 2016

This paper presents design of a 40 GHz CMOS PLL frequency synthesizer for a 60 GHz sliding-IF RF transceiver. For stable locking over a wide bandwith for a injection-locked frequency divider, an inductive-peaking technique is employed so that it ensures the PLL can safely lock across the very wide tuning range of the VCO. Also, Injection-locked type LC-buffer with low-phase noise and low-power consumption is added in between the VCO and ILFD so that it can block any undesirable interaction and performance degradation between VCO and ILFD. The PLL is designed in 65 nm CMOS precess. It covers from 37.9 to 45.3 GHz of the output frequency. and its power consumption is 74 mA from 1.2 V power supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.5
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• pp.522-527
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• 2011

In this work, a 54 GHz divide-by-3 injection-locked frequency divider(ILFD) based on ring oscillator has been developed in a 0.13-${\mu}M$ Si RFCMOS technology for phase-locked loop(PLL) application. The free-running frequency is 18.92~19.31 GHz with tuning range of 0~1.8 V, consuming 70 mW with a 1.8 V supply voltage. At 0 dBm input power, the locking range is 1.02 GHz(54.82~55.84 GHz) and, with varactor tuning of 0~1.8 V, the total operating range is 2.4 GHz(54.82~57.17 GHz). The fabricated circuit size is 0.42 mm${\times}$0.6 mm including probing pads and 0.099 mm${\times}$0.056 mm for core area.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1B
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• pp.183-192
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• 2000

In this paper, the dual looped CMOS PLL with 3-250MHz input locking range at a single 13.3V is designed. This paper proposed a new PLL architecture with a current pumping algorithm to improve voltage-to-frequencylinearity of VCO(Voltage Controlled Oscillator). The designed VCO operates at a wide frequency range of75.8MHz-lGHz with a high linearity. Also, PFD(Phase frequency Detector) circuit preventing voltage fluctuation of the charge pump with loop filter circuit under the locked condition is designed. The simulation results of the PLL using 0.6 um N-well single poly triple metal CMOS technology illustrate a locking time of 3.5 us, a power dissipation of 92mW at 1GHz operating frequency with 125MHz of input frequency. Measured results show that the phase noise of VCO with V-I converter is -100.3dBc/Hz at a 100kHz offset frequency.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.5
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• pp.1807-1824
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• 2015

As the technologies advance, mobile peer-to-peer (MP2P) networks or systems become one of the major ways to share resources and information. On such a system, the information retrieval (IR), including the development of scalable infrastructures for indexing, becomes more complicated due to a huge increase on the amount of information and rapid information change. To keep the systems on MP2P networks more reliable and consistent, the index structures need to be updated frequently. For a semantic IR system, the index structure is even more complicated than a classic IR system and generally has higher update cost. The most well-known indexing technique used in semantic IR systems is Latent Semantic Indexing (LSI), of which the index structure is generated by singular value decomposition (SVD). Although LSI performs well, updating the index structure is not easy and time consuming. In an MP2P environment, which is fully distributed and dynamic, the update becomes more challenging. In this work, we consider how to update the sematic index generated by LSI and keep the index consistent in the whole MP2P network. The proposed Concept Space Update (CSU) protocol, based on distributed 2-Phase locking strategy, can effectively achieve the objectives in terms of two measurements: coverage speed and update cost. Using the proposed effective synchronization mechanism with the efficient updates on the SVD, re-computing the whole index on the P2P overlay can be avoided and the consistency can be achieved. Simulated experiments are also performed to validate our analysis on the proposed CSU protocol. The experimental results indicate that CSU is effective on updating the concept space with LSI/SVD index structure in MP2P semantic IR systems.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.12
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• pp.1108-1111
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• 2015

In this paper, a ${\times}49$ frequency multiplier based on a ring oscillator and a multi-push multiplier is presented. The proposed ${\times}49$ frequency multiplier consists of two ${\times}7$ frequency multipliers and these multiplier is connected by injection-locking technique. Each ${\times}7$ frequency multiplier consists of a ring oscillator with 14-phase output signal and 7-push frequency multiplier requiring 14-phase input. The proposed ${\times}49$ frequency multiplier provides 2.78~2.83 GHz output signal with 56.7~57.7 MHz input signal. This operation frequency is defined that the output power difference between the carrier and the spur is above 10 dB. The proposed chip consumes 13.93 mW.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.11
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• pp.11-18
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• 2014

Most of the energy efficient MAC protocols for wireless sensor networks (WSNs) are based on duty cycling in a single channel and show competitive performances in a small number of traffic flows; however, under concurrent multiple flows, they result in significant performance degradation due to contention and collision. We propose a multi-channel pipelining (MCP) method for convergecast WSN in order to address these problems. In MCP, a staggered dynamic phase shift (SDPS) algorithms devised to minimize end-to-end latency by dynamically staggering wake-up schedule of nodes on a multi-hop path. Also, a phase-locking identification (PLI) algorithm is proposed to optimize energy efficiency. Based on these algorithms, multiple flows can be dynamically pipelined in one of multiple channels and successively handled by sink switched to each channel. We present an analytical model to compute the duty cycle and the latency of MCP and validate the model by simulation. Simulation evaluation shows that our proposal is superior to existing protocols: X-MAC and DPS-MAC in terms of duty cycle, end-to-end latency, delivery ratio, and aggregate throughput.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.6
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• pp.1334-1340
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• 2003

In this paper, We have proposed an Heterodyne technique to generate millimeter-wave signal. Microwave signals in cellular broadband mobile communication networks and distributed networks can favorably be generated and distributed by optical techniques. In principle, these techniques have already been investigated for optical control of phase- array antennas, characterization of photo-detector and phase locking of millimeter-wave oscillators and now being applied to wireless communications. The generation and transmission of millimeter-wave radio signals by optical means is of interest for future pico-cell broadband mobile communication system, especially for systems operating at frequencies of 300Hz.