• Title/Summary/Keyword: performance evaluation table

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Seismic Performance Evaluation of Sprinkler Facilities throughout Shaking Table Test (진동대 실험을 통한 스프링클러 설비의 내진성능 평가)

  • Nam, Min-Jun;Park, Seung-Hee;Kim, Dong-Jun;Yoon, Jong-Ku;Seo, Choon-Gyo
    • Proceedings of the Korea Institute of Fire Science and Engineering Conference
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    • 2012.04a
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    • pp.54-57
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    • 2012
  • 지진에 의한 2차 피해 중 화재로 인한 피해가 거의 대부분이다. 따라서, 소화설비의 내진설계는 반드시 필요하며 소화능력을 유지해야 한다. 본 연구에서는 진동대 실험을 통하여 스프링클러 설비의 내진성능을 평가하였다. 스프링클러 설비의 내진성능을 평가하기 위하여 일반 설비와 내진처리가 된 설비를 동시에 시공하여 그 성능을 평가하였다. 또한, 시설물의 거동특성을 파악하기 위하여 시설별 변위응답, 가속도 응답, 가속도 응답스펙트럼을 통하여 시설물에 대한 내진성능을 평가하였다.

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A Study on the Manufacture and the Performance Evaluation of Stereolithography System (쾌속 조형시스템의 제작 및 성능평가에 관한 연구)

  • Kang, Won-Joo;Kim, Jun-An;Lee, Seok-Hee;Paik, In-Hwan
    • Journal of the Korean Society for Precision Engineering
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    • v.16 no.4 s.97
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    • pp.19-25
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    • 1999
  • This paper addresses a development work of a SLA apparatus on laboratory basis. The SLA test machine is composed of optical, movement, curing and control subsystems. Optical part is performed by a He-Cd laser with mirror combination and mechanical movement is achieved by X-Y table. The developed system is evaluated by several test runs, and shows a good precision capability in forming a basic part. The technique used in this work can be extended to replace the high technology transfer cost of commercial RP machine.

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Development of Oversampling Sigma-Delta Modulators with Nouniform Multibit Quantizer (비균일 양자기에 의한 과표본화율의 멀티빗트 시그마-델타 변조기의 개발)

  • 박종연;장목순
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.1
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    • pp.21-27
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    • 1997
  • We have proposed a new structure of the multibit ovesampling sigma-delta modulator. To solve the problkem of requring the accurate precision of the analog components, the novel digital correction scheme with a ROM-table has been employed to enhance the SNR for the proposed system. This architecture has good features compared with the 1-bit approach, including significantly lower quantisation noise for a given oversampling ratio, as well as improve dstability characteristics. Then we hve shown the validity of the proposed system by use of the software developed for the performance evaluation and by realizing the system with SCFs(switched capacitor filters).

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Implementation and performance evaluation of network address translator (네트워크 주소변환 장치 구현 및 성능 평가)

  • Cho Tae-Kyung;Park Byoung-soo
    • Proceedings of the KAIS Fall Conference
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    • 2004.11a
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    • pp.225-229
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    • 2004
  • 현재 인터넷에서 사용하고 있는 네트워크 계층 프로토콜은 IP 버전 4 인데, 이러한 주소 부족 문제를 해결하고자 IP 주소 필드의 길이가 대폭 확장되는 IPv6 라는 새로운 인터넷 프로토콜을 개발하게 된다(5). 그러나 이러한 신 표준안을 인터넷에 실제로 적용하고 운영하기에는 많은 어려운 문제들이 남아있어 그 대안으로 NAT(Network Address Translation)[1]가 등장하게 된다. 그러나 이러한 NAT 기능은 외부 망으로부터의 접촉이 불가능하다는 특성을 가지고 있다. 이러한 특성은 보안 유지측면에서는 장점으로 작용하나, 소규모 기업이나 사무실이 웹(Web) 서버(Server) 나 메일(mail) 서버등을 두고 싶어하는 경우에는 외부에서의 접근이 허용되어야 하므로 단점이 된다. 본 연구에서는 이러한 단점을 파악하기 위하여 NAT 테이블(table) 에 수정을 가함으로써 사설망내부의 특정 서버에 접근할 수 있는 확장된 개념의 NAT를 제안하고자 한다. 아울러 이러한 NAT 기능을 이용하여 구성된 사설망 간의 연결기능을 제공할 수 있는 방법을 제안함으로써 기존의 가상 사설망(VPN : Virtual Private Network) 외 일부 기능도 수용할 수 있도록 하였다.

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Acceleration Techniques for Cycle-Based Login Simulation (사이클 기반 논리시뮬레이션 가속화 기법 연구)

  • Park, Young-Ho;Park, Eun-Sei
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.50 no.1
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    • pp.45-50
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    • 2001
  • With increasing complexity of digital logic circuits, fast and accurate verification of functional behaviour becomes most critical bottleneck in meeting time-to-market requirement. This paper presents several techniques for accelerating a cycle-based logic simulation. The acceleration techniques include parallel pattern logic evaluation, circuit size reduction, and the partition of feedback loops in sequential circuits. Among all, the circuit size reduction plays a critical role in maximizing logic simulation speedup by reducing 50% of entire circuit nodes on the average. These techniques are incorporated into a levelized table-driven logic simulation system rather than a compiled-code simulation algorithm. Finally, experimental results are given to demonstrate the effectiveness of the proposed acceleration techniques. Experimental results show more than 27 times performance improvement over single pattern levelized logic simulation.

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Problem Analysis and Study of Solution Device in Relation with Middle School Mathematics Performance Assessment (중학교 수학과 수행평가의 문제점 분석 및 그 해결 방안 연구)

  • 박재용
    • Journal of the Korean School Mathematics Society
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    • v.3 no.1
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    • pp.149-163
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    • 2000
  • The Ministry of Education have had us practice the performance test as a substitute proposal, however, all the more for the idealistic purport, our education front does not have such a sufficient condition as to practice the performance test for many classes and miscellaneous duties and over-populated class, and that practice has been enforced so abruptly without any drastic preparation and has caused much confusion from the beginning of that enforcement. Thus, these problematic concerns are remained as the tasks of the teachers to be solved by themselves in the front of education, and herein I came to do this research. The followings are the conclusions that I got as the results of the research (1) Performance test style should be applied in consideration of the students' achievement level and the gap of the teachers' recognition; descriptive test, portfolio assignment and formative test styles were proper for the students lacking basic study ability. (2) Descriptive test should have its beginning with the question items to which students can write the problem solving procedure logically rather than those to evaluate the creation ability and thinking ability: and putting down specifically the assessment standard could prevent students' confusion and scheme the impartiality of the assessment. (3) Portfolio assignment evaluation should be given with as interesting and suitable amounts as possible so that the students can do by themselves. (4) Utilizing the performance test table enabled easy management of documentary evidence. And it is needless to say that the success of the performance test should have preceding conditions like the teachers' understanding and their positive participation. Therefore, I'd like to give suggestions herein like the followings; (1) The performance test should not always be made into grades, and there is a need to develop the test gradually in the condition that the education surroundings permit by checking time, frequency, ratio and contents of the test while practicing the multiple choice writing test. (2) As long as the performance test has the aims of improving the studying and learning activities, any performance test only for the sake of making numerals with the thought that assessment is the disposal of the grades should be avoided, and the change of the lecturing styles and development of various assessing types and studying materials should be endeavored to confirm with the aims.

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Performance Evaluation of IRB System Using Seismic Isolation Test (내진시험을 통한 IRB 시스템의 성능 평가)

  • Park, Young-Gee;Ha, Sung Hoon;Woo, Jae Kwan;Choi, Seung-Bok;Kim, Hyun
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2013.04a
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    • pp.401-406
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    • 2013
  • This paper presents experimental evaluation of IRE (isolation roller bearing) seismic isolation device. From the combination of base isolation on the IRE system displacement response spectrum and acceleration response spectrum, the compressive strength and the coefficient of friction experiments. Also the IRE system is evaluated by environment test according to KS standards. Both the resonance and seismic experiments using a combination of the IRE and Natural Rubber Bearing (NRB) are performed in order to analyze the seismic isolation of the IRE system dynamic characteristics. For the given load and exciting frequency, the resonant frequency becomes lower, but the resonant magnification remains to be same. However, it is shown that when we consider the IRE only, the vibration on the table with the horizontal movement and the independent horizontal displacement due to the rolling motion of the plate and roller are significantly reduced. This result verifies that the proposed optimal design method of the IRE system is very effective.

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Implementation and Evaluation of a Web Ontology Storage based on Relation Analysis of OWL Elements and Query Patterns (OWL 요소와 질의 패턴에 대한 관계 분석에 웹 온톨로지 저장소의 구현 및 평가)

  • Jeong, Dong-Won;Choi, Myoung-Hoi;Jeong, Young-Sik;Han, Sung-Kook
    • Journal of KIISE:Databases
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    • v.35 no.3
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    • pp.231-242
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    • 2008
  • W3C has selected OWL as a standard for Web ontology description and a necessity of research on storage models that can store OWL ontologies effectively has been issued. Until now, relational model-based storage systems such as Jena, Sesame, and DLDB, have been developed, but there still remain several issues. Especially, they lead inefficient query processing performance. The structural problems of their low query processing performance are as follow: Jena has a simple structure which is not normalized and also stores most information in a single table. It exponentially decreases the performance because of comparison with unnecessary information for processing queries requiring join operations as well as simple search. The structures of storages(e.g., Sesame) have been completely normalized. Therefore it executes many join operations for query processing. The storages require many join operations to find simply a specific class. This paper proposes a storage model to resolve the problems that the query processing performance is decreased because of non-normalization or complete normalization of the existing storages. To achieve this goal, we analyze the problems of existing storage models as well as relations of OWL elements and query patterns. The proposed model, defined with the analysis results, provides an optimal normalized structure to minimize join operations or unnecessary information comparison. For the experiment of query processing performance, a LUBM data sets are used and query patterns are defined considering search targets and their hierarchical relations. In addition, this paper conducts experiments on correctness and completeness of query results to verify data loss of the proposed model, and the results are described. With the comparative evaluation results, our proposal showed a better performance than the existing storage models.

Evaluation on the Performance of Deep Excavation by Using PIV Technique

  • Abbas, Qaisar;Song, Ju-sang;Yoo, Chung-Sik
    • Journal of the Korean Geosynthetics Society
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    • v.16 no.4
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    • pp.191-210
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    • 2017
  • The concern study, present the results of experimental study on the performance of deep excavation by using image processing technique particle image velocimetry (PIV). The purpose of present study is to check the application of PIV for the successive ground deformation during deep excavation. To meet the objectives of concern study, a series of reduce scale model test box experiments are performed by considering the wall stiffness, ground water table effect and ground relative density. The results are presented in form of contour and vector plots and further based on PIV analysis wall and ground displacement profile are drawn. The results of present study, indicate that, the PIV technique is useful to demonstrate the ground deformation zone during the successive ground excavation as the degree of accuracy in PIV analysis and measured results with LVDT are within 1%. Further the vector and contours plot effectively demonstrate the ground behavior under different conditions and the PIV analysis results fully support the measured results.

The design and performance evaluation of a high-speed cell concentrator/distributor with a bypassing capability for interprocessor communication in ATM switching systems (ATM교환기의 프로세서간 통신을 위한 바이패싱 기능을 갖는 고속 셀 집속/분배 장치의 설계 및 성능평가)

  • 이민석;송광석;박동선
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.6
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    • pp.1323-1333
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    • 1997
  • In this paper, we propose an efficient architecture for a high-speed cell concentrator/distributor(HCCD) in an ATM(Asynchronous Transfer Mode) switch and by analyzeing the simulation results evaluate the performance of the proposed architecuture. The proposed HCCD distributes cells from a switch link to local processors, or concentrates cells from local processor s to a switch link. This design is to guarntee a high throughput for the IPC (inter-processor communication) link in a distributed ATM switching system. The HCCD is designed in a moudlar architecture to provide the extensibility and the flexibility. The main characteristics of the HCCD are 1) Adaption of a local CPU in HCCD for improving flexibility of the system, 2) A cell-baced statistical multiplexing function for efficient multiplexing, 3) A cell distribution function based on VPI(Virtual Path Identifier), 4) A bypassing capability for IPC between processor attached to the same HCCD, 5) A multicasting capability for point-to-multipoint communication, 6) A VPI table updating function for the efficient management of links, 7) A self-testing function for detecting system fault.

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