• Title/Summary/Keyword: parallelism

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Deep Learning Model Parallelism (딥러닝 모델 병렬 처리)

  • Park, Y.M.;Ahn, S.Y.;Lim, E.J.;Choi, Y.S.;Woo, Y.C.;Choi, W.
    • Electronics and Telecommunications Trends
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    • v.33 no.4
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    • pp.1-13
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    • 2018
  • Deep learning (DL) models have been widely applied to AI applications such image recognition and language translation with big data. Recently, DL models have becomes larger and more complicated, and have merged together. For the accelerated training of a large-scale deep learning model, model parallelism that partitions the model parameters for non-shared parallel access and updates across multiple machines was provided by a few distributed deep learning frameworks. Model parallelism as a training acceleration method, however, is not as commonly used as data parallelism owing to the difficulty of efficient model parallelism. This paper provides a comprehensive survey of the state of the art in model parallelism by comparing the implementation technologies in several deep learning frameworks that support model parallelism, and suggests a future research directions for improving model parallelism technology.

Static Analysis of AND-parallelism in Logic Programs based on Abstract Interpretation (추상해석법을 이용한 논리언어의 AND-병렬 태스크 추출 기법)

  • Kim, Hiecheol;Lee, Yong-Doo
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1997.11a
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    • pp.79-89
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    • 1997
  • Logic programming has many advantages as a paradigm for parallel programming because it offers ease of programming while retaining high expressive power due to its declarative semantics. In parallel logic programming, one of the important issues is the compile-time parallelism detection. Static data-dependency analysis has been widely used to gather some information needed for the detection of AND-parallelism. However, the static data-dependency analysis cannot fully detect AND-parallelism because it does not provide some necessary functions such as the propagation of groundness. As an alternative approach, abstract interpretation provides a promising way to deal with AND-parallelism detection, while a full-blown abstract interpretation is not efficient in terms of computation since it inherently employs some complex operations not necessary for gathering the information on AND-parallelism. In this paper, we propose an abstract domain which can provide a precise and efficient way to use the abstract interpretation for the detection of AND-parallelism of logic programs.

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Parallelism Measurement of Rolls by Using a Laser Interferometer (레이저 간섭계를 이용한 롤 평행도 측정 기술)

  • Choi, Jong Geun;Kim, Seongeun
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.23 no.6
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    • pp.642-646
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    • 2014
  • This research describes the measurement of roll parallelism by a laser interferometer. Parallelism among rolls is an important factor for improving the precision of printing devices. A laser interferometer, which is a device for the precise measurement of distance, can be utilized to measure parallelisms between rolls. To measure distance between two rolls by using a laser interferometer, the laser must not be severed during measurement. To achieve this condition, a linear motion guide was installed to each roll being measured, and continuous measurement of distance between two rolls was implemented by the simultaneous control of two mirrors installed on the guides. The method to measure parallelism between two rolls presented in this research can be utilized to improve printing precision by enhancing parallelism between rolls in printing devices.

Algorithm for Functional and Declarative Language in Parallel Machine (Parallel Machine에 있어서의 Functional, Declarative 언어의 Algorithm)

  • Kim, Jin-Su
    • The Journal of Natural Sciences
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    • v.5 no.2
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    • pp.39-43
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    • 1992
  • Detection of parallelism by a compiler is very desirable from a user's point of view. However, even the most sophisticated techniques to detect parallelism trip on trivial impediments, such as conditionals, function calls, and input/output statements, fail to detect most of the parallelism present in a program. Some parallelizing compilers provide feedback to the user when they have difficulty in deciding about parallel execution. Under these circumstances, a programmer has to restructure the source code to aid the detection of parallelism. But, functional and declarative languages can be said to offer many advantages in this context. Functional programs are easier to reason about because their output is determinate, that is, independent of the order of evaluation. However, functional languages traditionally have lacked good facilities for manipulating arrays and matrices. In this paper, a declarative language called Id has been proposed as a solution to some of these problems.

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A Study on Effect of Code Distribution and Data Replication for Multicore Computing Architectures

  • Cho, Doosan
    • International Journal of Advanced Culture Technology
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    • v.9 no.4
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    • pp.282-287
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    • 2021
  • A multicore system must be able to take full advantage of the program's instruction and data parallelism. This study introduces the data replication technique as a support technique to maximize the program's instruction and data parallelism. Instruction level parallelism can be limited by data dependency. In this case, if data is replicated to each processor core and used, instruction level parallelism can be used to the maximum. The technique proposed in this study can maximize the performance improvement effect when applied to scientific applications such as matrix multiplication operation.

A Representation for Multithreaded Data-parallel Programs : PCFG(Parallel Control Flow Graph) (다중스레드 데이타 병렬 프로그램의 표현 : PCFG(Parallel Control Flow Graph))

  • 김정환
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.12
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    • pp.655-664
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    • 2002
  • In many data-parallel applications massive parallelism can be easily extracted through data distribution. But it often causes very long communication latency. This paper shows that task parallelism, which is extracted from data-parallel programs, can be exploited to hide such communication latency Unlike the most previous researches over exploitation of task parallelism which has not been considered together with data parallelism, this paper describes exploitation of task parallelism in the context of data parallelism. PCFG(Parallel Control Flow Graph) is proposed to represent a multithreaded program consisting of a few task threads each of which can include a few data-parallel loops. It is also described how a PCFG is constructed from a source data-parallel program through HDG(Hierarchical Dependence Graph) and how the multithreaded program can be constructed from the PCFG.

Parallelism Measurement for Guide Rails of Precision Machine Tools (정밀 공작기계 안내면의 평행도 측정)

  • Hwang J.H.;Park C.H.;Gao W.;Kim S.W.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.792-795
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    • 2005
  • The guide-ways of precision machine tools are one of important element of machine tools. It has usually a pair of surfaces for constraint of one direction with bearing. In the case of precision machine tools, non-contact bearing such as hydrostatic bearing and aerostatic bearing is adopted usually. In this case, profiles of rails has effect on straightness and the clearance of bearing has effect on stiffness of guide way, which changes to higher if clearance changes to smaller. The clearance is varied along moving table according to relative distance of pair of rails. The relative distance of pair of rail can be divided by three properties. First and second properties are straightness of each pair of rail and bearing pad. And, third is parallelism about pair of rails and pairs of bearing pad. There are several methods for measuring straightness of each surface such as reversal method, sequential two point method, and way straightness. These straightness measuring methods are always acquiring deviation of profile from eliminating linear fitted inclined line and don't have the information of parallelism. Therefore, to get the small clearance for high stiffness, the straightness of rail and bearing pad and parallelism about pair of rails and pair of bearing pads are measured for correction such as regrinding, reassembling and lapping. In this research, new and easy method for measuring parallelism of pair of rails is suggested. Two displacement probe and sensor stage, which is carry on the displacement sensor, are needed. The simulation and experiment was accomplished about pair of horizontal guide way to confirm the measurement of parallelism. And, the third probe is added to measure the straightness of each rails by sequential two point method. From the estimation of combined these two methods, it is confirmed that the profiles of a pairs of rails can be measured.

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Parallelism and Straightness Measurement of a Pair of Rails for Ultra Precision Guide-ways (초정밀 안내면 레일의 평행도 및 진직도 동시측정)

  • Hwang, Joo-Ho;Park, Chun-Hong;Wei, Gao;Kim, Seung-Woo
    • Journal of the Korean Society for Precision Engineering
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    • v.24 no.3 s.192
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    • pp.117-123
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    • 2007
  • This paper describes a three-probe system that can be used to measure the parallelism and straightness of a pair of rails simultaneously. The parallelism is measured using a modified reversal method, while the straightness is measured using a sequential two-point method. The measurement algorithms were analyzed numerically using a pair of functionally defined rails to validate the three-probe system. Tests were also performed on a pair of straightedge rails with a length of 250 mm and a maximum straightness deviation of $0.05{\mu}m$, as certified by the supplier. The experimental results demonstrated that the parallelism-measurement algorithm had a cancellation effect on the probe stage motion error. They also confirmed that the proposed system could measure the slope of a pair of rails about $0.06{\mu}rad$. Therefore, by combining this technique with a sequential differential method to measure the straightness of the rails simultaneously, the surface profiles could be determined accurately and eliminate the stage error. The measured straightness deviation of each straight edge was less than $0.05{\mu}m$, consistent with the certified value.

Extracting Maximum Parallelism for Parallel Computing (병렬 계산을 위한 최대 병렬성 추출 방법)

  • Park, Doo-Soon
    • The Journal of Korean Association of Computer Education
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    • v.8 no.1
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    • pp.93-103
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    • 2005
  • Since the most program execution time is consumed in a loop structure, extracting parallelism from sequential loop programs is critical for the faster program execution. Conventional studies for extracting the parallelism are focused mostly on a uniform data dependence distance. In this paper, we proposed data dependency elimination method for a nested loop and extended data dependency elimination method to extract parallelism from the loop with procedure calls. The data dependency elimination method and the extended data dependency elimination method can be applied to uniform and non-uniform data dependency distance. We compared our method with conventional methods using CRAY-T3E for the performance evaluation. The results show that the proposed algorithms are very effective.

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Parallelism Error Compensation for Force Measurement by Electromagnetic Compensation (전자기력 보상방식의 힘 측정을 위한 평행도 오차 보상)

  • 최인묵;우삼용;김부식
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2003.06a
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    • pp.1051-1054
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    • 2003
  • For micro-weighing, null balance method is widely used in the precision industrial fields, such as biomedicine, semiconductor, chemistry and so on. In order to obtain high resolution and large measurement range simultaneously, the mechanism should be analyzed and optimized. However, large measurement error can be generated according to the mass loading position and this error is called as a corner loading error. The corner loading error is caused by the parallelism error of a Roberval mechanism used to minimize it. The corner loading error is one of the most dominant error sources that should be removed. It is possible to design that the mechanism has no corner loading error theoretically, but the mechanism of the micro weighing device is very difficult to be realized as original design due to assembling and manufacturing error. For the required specification of the device, the precise manufacturing technique under a few $\mu\textrm{m}$ is required for the realization of the design. In this paper, the effects of the parallelism error are analyzed by using Lagrange method and verified by experiment. Also, the compensation mechanism is proposed and the corner loading error is reduced by restoring tile parallelism.

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