• The Korea Journal of Herbology
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• v.24 no.4
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• pp.165-171
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• 2009

Objectives : In the present study, we assessed the effects of the ethanolic extract of Crataegus pinnatifida Bunge on the learning and memory impairments induced by scopolamine using the passive avoidance and the Morris water maze tasks in mice. Methods : The cognition-enhancing effect of C. pinnatifida was investigated using a passive avoidance test, the Morris water maze test and Y-maze test in mice. Drug-induced amnesia was induced by treating animals with scopolamine (1 mg/kg, i.p.). Results : The ethanolic extract of C. pinnatifida (100, and 200 mg/kg) significantly reversed the scopolamine-induced cognitive impairments in the passive avoidance test (p < 0.05). Moreover, C. pinnatifida (200 mg/kg) also improved escape latencies in training trials and increased swimming times and distances within the target zone of the Morris water maze (p < 0.05). On the Y-maze test, C. pinnatifida (100, and 200 mg/kg) also significantly reversed scopolamine- induced cognitive impairments in mice (p < 0.05). Conclusions : The ethanolic extract of Crataegus pinnatifida dramatically possesses the anti-amnestic and cognitive-enhancing activities related to the memory processes, and these activities were parallel to treatment duration and dependent on the learning models.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.2 no.2
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• pp.69-78
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• 1991

전자파장해 측정에 사용되는 대표적인 측정시설에는 접지면(ground plane)을 갖춘 야외시험장 (open area test site), 전자파반무향실(semianechoic chamber), TEM(transverse Electromagnetic) cell, 평행판선로(parallel plate line), 헬름홀츠코일(Helmholtz coil), 전자파잔향실(reverberating chamber) 등이 있으며, 이러한 시설은 시험대상기기의 크기, 주파수대역, 적용규격의 규제치, 측정하고자 하는 전자기장의 형태 및 편파면, 그리고 시험신호의 전기적 특성(주파수영역 또는 시간영역) 등을 고려하여 선택되고 구성되 어야 한다. 실제로 시험장소를 건설하는데 막대한 비용이 소요되고, 큰 측정오차를 유발시킬 수 있기 때문에 매우 신중 하게 설계, 구성하여야 한다.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.533-536
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• 1998

The electrical characteristics of NMOSFETs with asymmetrical source/drain regions have been expermentally investigated using test devices fabricated by $0.35\mu\textrm{m}$ CMOS technology. The performance degradation for asymmetric transistor and its causes are analyzed. The parasitic resistances, such as series resistance of active regions and silicide junction contact resistance, are distributed in parallel along the channel. Depending on source/drain geometry, the array of those resistances is changed, that results the various electrical properties.

• 한국연소학회:학술대회논문집
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• 2012.11a
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• pp.295-296
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• 2012

In Korea, study of monopropellant thruster have been started from 1990s by KARI (Korea Aerospace Research Institute). 5N hydrazine thruster that is a first Koreanized hydrazine thruster, have been used as flight model for several satellite. In parallel, in order to retain core technology for monopropellant thruster, catalyst and test facility development have been carried out and successfully completed. On the basis of these technology, KARI is performing development of 1N/200N hydrazine thruster and basic research of green propellant thruster.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.1135-1139
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• 1989

Three layered neural network was applied for the pattern recognition problem of human spermatozoa in clinical test. The goodness of recognition rate was studied in relation to the number of hidden layer cells and of output layer cells. The proposed method provided better results than conventional template matching technique. Parallel processing of the back propagation learning algorithm was also studied using transputers and its performance was evaluated.

• 한국초전도학회:학술대회논문집
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• v.14
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• pp.85-85
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• 2004

• 한국데이터정보과학회:학술대회논문집
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• 2002.06a
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• pp.89-95
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• 2002

This paper considers the problem of estimating paramaters of the bivariate exponential distribution with a loaction parameter for a two-component shared parallel system using component data from system-level life test terminated at the time of the prespecified number of system failure. In the system-level life testing, there are three patterns of failure types; 1) both component failed 2) both component censored 3) one is failed and the other is censored. In the third case, we assume that the failure time might be known or unknown. The maximum likelihood estimators are obtained for the case of known/unknown failure time when the other component is censored.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.433-437
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• 1998

Equalize SOC of the cell which effect on the charge.discharge ability and the efficiency of the battery, through the charge.discharge characteristic test of the battery source, and develope the high efficiency charge.discharge system in the series HEV have a constant engine-generator output. For this, in this paper, establish the electrical model and the condition of high efficiency charge.discharge, and proposed the improvement method of charge.discharge characteristic in the battery source that consist of twenty Ni-MH cells connected serial/parallel

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.3
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• pp.444-450
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• 1996

A digital hardware architecture for artificial neural network with learning capability is described in this paper. It is a modified hardware architecture known as HANNIBAL(Hardware Architecture for Neural Networks Implementing Back propagation Algorithm Learning). For implementing an efficient neural network hardware, we analyzed various type of multiplier which is major function block of neuro-processor cell. With this result, we design a efficient digital neural network hardware using serial/parallel multiplier, and test the operation. We also analyze the hardware efficiency with logic level simulation. (author). refs., figs., tabs.

• Journal of the Korea Computer Graphics Society
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• v.26 no.1
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• pp.17-25
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• 2020

We present a novel multi-core CPU based parallel algorithm for the cell-connectivity information extraction algorithm, which is one of the preprocessing steps for volume rendering of unstructured grid data. We first check the synchronization issues when parallelizing the prior serial algorithm naively. Then, we propose a 3-step parallel algorithm that achieves high parallelization efficiency by removing synchronization in each step. Also, our 3-step algorithm improves the cache utilization efficiency by increasing the spatial locality for the duplicated triangle test process, which is the core operation of building cell-connectivity information. We further improve the efficiency of our parallel algorithm by employing a memory pool for each thread. To check the benefit of our approach, we implemented our method on a system consisting of two octa-core CPUs and measured the performance. As a result, our method shows continuous performance improvement as we add threads. Also, it achieves up to 82.9 times higher performance compared with the prior serial algorithm when we use thirty-two threads (sixteen physical cores). These results demonstrate the high parallelization efficiency and high cache utilization efficiency of our method. Also, it validates the suitability of our algorithm for large-scale unstructured data.