• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.302-304
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• 2005

본 논문에서는 입력단 역률제어 및 고조파 전류억제를 위해 PWM 컨버터를 이용하는 3상 UPS에서 직류측을 공통으로 연결하여 하나의 배터리 유닛만으로 병렬 UPS운전이 가능한 공통 배터리 운전에 대해 기술한다. 직류측을 공통으로 이용함으로써 PWM 컨버터 간에 흐를 수 있는 순환전류를 없애기 위한 제어기를 제안하고 실험을 통해 제안한 방법의 타당성을 검토한다.

• Journal of Power Electronics
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• 제15권1호
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• pp.1-9
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• 2015

This study presents a novel transformer isolated parallel connected quasi Z-source (qZ-source) full-bridge DC-DC converter that uses a coupled inductor in both the qZ-source network and output filter inductor. Unlike traditional voltage-fed or current-fed converters, the proposed converter can be open- and short-circuited without damaging switching devices. Therefore, the desired buck and boost functions can be achieved and converter reliability can be significantly improved. All the bulky inductors in the qZ-source network and output filter can also be minimized with the proposed inductor structures. A 4 kW prototype DC-DC converter is built and tested to verify the performance of the proposed converter.

• Journal of Power Electronics
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• 제15권6호
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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• pp.269-272
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• 1988

This paper introduces a method to reduce the reactive power required by electronic converters. The instantaeous reactive power is calculated and compensated by the current controlled PWH voltage source converter connected parallel between the power lines and the converter. A high performance current control technique which is based on the current deviation vector is used for the PWM converter as compensator of reactive power. Accurate compensation of the reactive power and t control system ensuring fast response to the sudden change of loaf are attained. The converter structure and control scheme are discussed. Simulation of the system is performed.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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• pp.957-960
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• 2003

Many solar cell way need to be connected by series or parallel to extract the high power Especially, during parallel operation to reduce circulation current the individual converter has to share and control the load current. Generally, Current Sharing(CS) can be implemented using droop and active current sharing method. In this paper, one 3[KW] PWM converter was replaced as one 3[KW] solar cell array(3 parallels, each parallel has twenty single modules), two 3[KW] solar cell way Is Paralleled to generate 6[KW] power. Also each converter used voltage-current controller and Automatic MSCPM(Master-Slave Current-programming Method) for current sharing(AS).

• Journal of Power Electronics
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• 제15권2호
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• pp.327-337
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• 2015

This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

• Journal of Electrical Engineering and Technology
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• 제9권4호
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• pp.1296-1308
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• 2014

This paper presents a new zero voltage switching (ZVS) converter for medium power and high input voltage applications. Three three-level pulse-width modulation (PWM) circuits with the same power switches are adopted to clamp the voltage stress of MOSFETs at $V_{in}/2$ and to achieve load current sharing. Thus, the current stresses and power ratings of transformers and power semiconductors at the secondary side are reduced. The resonant inductance and resonant capacitance are resonant at the transition interval such that active switches are turned on at ZVS within a wide range of input voltage and load condition. The series-connected transformers are adopted in each three-level circuit. Each transformer can work as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer. Thus, no output inductor is needed at the secondary side. Three center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Compared with the conventional parallel three-level converters, the proposed converter has less switch counts. Finally, experiments based on a 1.44kW prototype are provided to verify the operation principle of proposed converter.

• Journal of Power Electronics
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• 제16권1호
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• pp.121-132
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• 2016

In this paper, high-efficiency design methodology of a zero-voltage-switching full-bridge (ZVS-FB) pulse width modulation (PWM) converter for server-computer power supply is discussed based on self-driven synchronous rectifier (SR) performance. The design approach focuses on rectifier conduction loss on the secondary side because of high output current application. Various-number parallel-connected SRs are evaluated to reduce high conduction loss. For this approach, the reliability of gate control signals produced from a self-driver is analyzed in detail to determine whether the converter achieves high efficiency. A laboratory prototype that operates at 80 kHz and rated 1 kW/12 V is built for various-number parallel combination of SRs to verify the proposed theoretical analysis and evaluations. Measurement results show that the best efficiency of the converter is 95.16%.

• Journal of Power Electronics
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• 제13권1호
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• pp.20-30
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• 2013

This paper presents a soft switching DC/DC converter for high voltage application. The interleaved pulse-width modulation (PWM) scheme is used to reduce the ripple current at the output capacitor and the size of output inductors. Two converter cells are connected in series at the high voltage side to reduce the voltage stresses of the active switches. Thus, the voltage stress of each switch is clamped at one half of the input voltage. On the other hand, the output sides of two converter cells are connected in parallel to achieve the load current sharing and reduce the current stress of output inductors. In each converter cell, a half-bridge converter with the asymmetrical PWM scheme is adopted to control power switches and to regulate the output voltage at a desired voltage level. Based on the resonant behavior by the output capacitance of power switches and the transformer leakage inductance, active switches can be turned on at zero voltage switching (ZVS) during the transition interval. Thus, the switching losses of power MOSFETs are reduced. The current doubler rectifier is used at the secondary side to partially cancel ripple current. Therefore, the root-mean-square (rms) current at output capacitor is reduced. The proposed converter can be applied for high input voltage applications such as a three-phase 380V utility system. Finally, experiments based on a laboratory prototype with 960W (24V/40A) rated power are provided to demonstrate the performance of proposed converter.

• Journal of Electrical Engineering and Technology
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• 제1권2호
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• pp.216-225
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• 2006

This paper presents a new circuit topology of DC busline switch and snubbing capacitor-assisted full-bridge soft-switching PWM inverter type DC-DC power converter with a high frequency link for low voltage large current applications as DC feeding systems, telecommunication power plants, automotive DC bus converters, plasma generator, electro plating plants, fuel cell interfaced power conditioner and arc welding power supplies. The proposed power converter circuit is based upon a voltage source-fed H type full-bridge high frequency PWM inverter with a high frequency transformer link. The conventional type high frequency inverter circuit is modified by adding a single power semiconductor switching device in series with DC rail and snubbing lossless capacitor in parallel with the inverter bridge legs. All the active power switches in the full-bridge inverter arms and DC busline can achieve ZVS/ZVT turn-off and ZCS turn-on commutation operation. Therefore, the total switching losses at turn-off and turn-on switching transitions of these power semiconductor devices can be reduced even in the high switching frequency bands ranging from 20 kHz to 100 kHz. The switching frequency of this DC-DC power converter using IGBT power modules is selected to be 60 kHz. It is proved experimentally by the power loss analysis that the more the switching frequency increases, the more the proposed DC-DC converter can achieve high performance, lighter in weight, lower power losses and miniaturization in size as compared to the conventional hard switching one. The principle of operation, operation modes, practical and inherent effectiveness of this novel DC-DC power converter topology is proved for a low voltage and large current DC-DC power supplies of arc welder applications in industry.