• Journal of the Microelectronics and Packaging Society
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• v.17 no.1
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• pp.69-73
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• 2010

Finite-element analyses were conducted to investigate the thermal stress in 3-dimensional stacked wafers package containing through-silicon-via (TSV), which is being widely used for 3-Dimensional integration. With finite element method (FEM), thermal stress was analyzed with the variation of TSV diameter, bonding diameter, pitch and TSV height. It was revealed that the maximum von Mises stresses occurred at the edge of top interface between Cu TSV and Si and the Si to Si bonding site. As TSV diameter increased, the von Mises stress at the edge of TSV increased. As bonding diameter increased, the von Mises stress at Si to Si bonding site increased. As pitch increased, the von Mises stress at Si to Si bonding site increased. The TSV height did not affect the von Mises stress. Therefore, it is expected that smaller Cu TSV diameter and pitch will ensure mechanical reliability because of the smaller chance of plastic deformation and crack initiation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.4
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• pp.503-509
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• 2019

The demand for smaller, faster, and multi-functional mobile devices in increasing at a rapidly increasing rate. In response to these trends, Stacked Chip Scale Package (SCSP) is used widely in the assembly industry. A film type adhesive called die attach film (DAF) is used widely for bonding chips in SCSP. The DAF requires high flowability at high die attachment temperatures for bonding chips on organic substrates, where the DAF needs to feel the gap depth, or for bonding the same sized dies, where the DAF needs to penetrate bonding wires. In this study, the mixture design of experiment (DOE) was performed for three raw materials to obtain the optimized DAF recipe for low elastic modulus at high temperature. Three components are acrylic polymer (SG-P3) and two solid epoxy resins (YD011 and YDCN500-1P) with different softening points. According to the DOE results, the elastic modulus at high temperature was influenced greatly by SG-P3. The elastic modulus at $100^{\circ}C$ decreased from 1.0 MPa to 0.2 MPa as the amount of SG-P3 was decreased by 20%. In contrast, the elastic modulus at room temperature was dominated by YD011, an epoxy with a higher softening point. The optimized DAF recipe showed approximately 98.4% pickup performance when a UV dicing tape was used. A DAF crack that occurred in curing was effectively suppressed through optimization of the cure accelerator amount and two-step cure schedule. The imizadole type accelerator showed better performance than the amine type accelerator.

• Journal of the Korean Society for Nondestructive Testing
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• v.19 no.5
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• pp.369-377
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• 1999

Recently, it is gradually raised necessity that thickness of thin film is measured accuracy and managed in industrial circles and medical world. Ultrasonic signal processing method is likely to become a very powerful method for NDE method of detection of microdefects and thickness measurement of thin film below the limit of ultrasonic distance resolution in the opaque materials, provides useful information that cannot be obtained by a conventional measuring system. In the present research. considering a thin film below the limit of ultrasonic distance resolution sandwiched between three substances as acoustical analysis model, demonstrated the usefulness of ultrasonic signal processing technique using information of ultrasonic frequency for NDE of measurements of thin film thickness. Accordingly, for the detection of delamination between the junction condition of boundary microdefect of thin film sandwiched between three substances the results from digital image processing.

• Journal of the Institute of Convergence Signal Processing
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• v.10 no.2
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• pp.120-126
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• 2009

There are many different types of surface defects on semiconductor Integrated Chips (IC's) caused by various factors during manufacturing process, such as cracks, foreign materials, chip-outs, chips, and voids. These defects must be detected and classified by an inspection system for productivity improvement and effective process control. Among defects, in particular, foreign materials and chips are the most difficult ones to classify accurately. A vision system composed of a carefully designed optical system and a processing algorithm is proposed to detect and classify the defects on QFN(Quad Flat No-leads) packages. The processing algorithm uses features derived from the defect's position and brightness value in the Maximum Likelihood classifier and the optical system is designed to effectively extract the features used in the classifier. In experiments we confirm that this method gives more effective result in classifying foreign materials and chips.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.369-370
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• 2005

LTCC (Low Temperature Cofired Ceramic) technology is one of technologies which can realize SIP (System-In-a-Package). In this paper realization of gas sensor using LTCC technology was described. In the conventional gas sensor structure, wire bonding method is generally used as an interconnection method whereas in the LTCC sensor structure, via was used for the interconnection. As sensing materials, $SnO_2$ was adopted. The effect of frit glass portion on the adhesion of the sensing material to the LTCC substrate and the electrical conductivity of the sensing material were analyzed. AgPd, PdO, Pt was added to the sensing material as an additive for improving the gas sensitivity and electrical conductivity and the effect of the amount of additives in the sensing material on the electrical conductivity was investigated. The effect of the amount of frit glass in the termination on the sensor performance, especially mechanical integrity, was considered and the crack initiation and propagation in the boundary between the sensing material and the termination was studied.