Thermo-Mechanical Analysis of Though-silicon-via in 3D Packaging
![]() |
Hwang, Sung-Hwan
(Department of Materials Science & Engineering, Seoul National University)
Kim, Byoung-Joon (Department of Materials Science & Engineering, Seoul National University) Jung, Sung-Yup (Department of Materials Science & Engineering, Seoul National University) Lee, Ho-Young (Department of Materials Science & Engineering, Seoul National University) Joo, Young-Chang (Department of Materials Science & Engineering, Seoul National University) |
1 | Liu Chen, Qun Zhang, Guozhong Wang, Xiaoming Xie and Zhaonian Cheng, "The Effects of Underfill and Its Material Models on Thermomechanical Behaviors of a Flip Chip Package", IEEE T. Adv. Packaging. 24(1), 17 (2001). DOI ScienceOn |
2 | C. J. Smithells, Metals Reference Book, Vol. III, pp. 686-708, Butterworths, London (1967). |
3 | Jing Zhang 1, Max O. Bloomfield, Jian-Qiang Lu, Ronald J. Gutmann, Timothy S. Cale, "Thermal stresses in 3D IC interwafer interconnects", Microelectron. Eng., 82, 534 (2005). DOI ScienceOn |
4 |
K. W. Guarini, A. W. Topol, M. Ieong, R. Yu, L. Shi, M. R. Newport, D. J. Frank, D. V. Singh, G. M. Cohen, S. V. Nitta, D. C. Boyd, P. A. O'Neil, S. L. Tempest, H. B. Pogge, S. Purushothaman and W. E. Haensch, "Electrical Integrity of State-of-the-art 0.13 |
5 | Sang-Woon Seo and Gu-Sung Kim, "The Film Property and Deposition Process of TSV Inside for 3D Interconnection", J. Microelectron. Packag. Soc., 15(3), 47 (2008). 과학기술학회마을 |
6 | Min-Seung Yoon, "Introduction of TSV (Through Silicon Via) Technology", J. Microelectron. Packag. Soc., 16(1), 1 (2009). 과학기술학회마을 |
7 | R.R. Reeber and K. Wang, "Thermal expansion and lattice parameters of group IV semiconductors", Mater. Chem. Phys. 46, 259 (1996). DOI ScienceOn |
8 | K.H. Hellwege and A.M. Hellwege, Landolt-Bornstein: Numerical Data and Functional Relationships in Science and Technology, Group III: Vol. 1, Springer-Verlag (1966). |
9 | M.B. Bever, Encyclopedia of Materials Science and Engineering, Pergamon Press (1986). |
10 | E.A. Brandes and G.B. Brook, Smithells Metals Reference Book, 7th edition, Buttterworth-Heinemann (1999). |
11 | N. Koyanagi, H. Kurino, K. W. Lee, K Sakuma, N Miyakawa and H Itani, "Future System-on-Silicon LSI Chips", IEEE Micro. 18, 17 (1998). DOI ScienceOn |
12 | J.O. Seong and B. Daniel, "High Density, Aspect Ratio Through-wafer Electrical Interconnect Vias for Low Cost, Generic Modular MEMS Packaging", Advanced Packaging Materials, 8 (2002). |
13 | M. Karnezos, "3D Packaging: Where All Technologies Come Together", IEEE/CPMT/Semi 29th International Electronics Manufacturing Symposium, 64 (2004). |
![]() |