• Computers and Concrete
• /
• v.3 no.2_3
• /
• pp.79-90
• /
• 2006

This paper describes the results of an investigation into high mass-low velocity impact behaviour of reinforced concrete beams. Tests have been conducted on fifteen 2.7 m or 1.5 m span beams under drop-weight loads. A high-speed video camera has been used at rates of up to 4,500 frames per second in order to record the crack formation, propagation, particle spallation and scabbing. In some tests the strain in the reinforcement has been recorded using "Durham" strain gauged bars, a technique developed by Scott and Marchand (2000) in which the strain gauges are embedded in the bars, so that the strains in the reinforcement can be recorded without affecting the bond between the concrete and the reinforcement. The impact force acting on the beams has been measured using a load cell placed within the impactor. A high-speed data logging system has been used to record the impact load, strains, accelerations, etc., so that time histories can be obtained. This research has led to the development of computational techniques based on combined continuum/discontinuum methods (finite/discrete element methods) to permit the simulation of impact loaded reinforced concrete beams. The implementation has been within the software package ELFEN (2004). Beams, similar to those tested, have been analysed using ELFEN a good agreement has been obtained for both the load-time histories and the crack patterns.

• Proceedings of the KIEE Conference
• /
• 2004.11c
• /
• pp.478-480
• /
• 2004

다이아몬드 톱날을 이용한 얇은 Si 웨이퍼의 기계적인 다이싱은 chipping, crack 등의 문제점을 발생시킨다. 또한 stacked die 나 multi-chip등과 같은 3D-WLP(wafer level package)에서 via를 생성하기 위해 현재 사용되는 화학적 etching은 공정속도가 느리고 제어가 힘들며, 공정이 복잡하다는 문제점을 가지고 있다. 이러한 문제점을 해결하기 위해 현재 연구되고 있는 분야가 레이저를 이용한 웨이퍼 다이싱 및 드릴링이다. 본 논문에서는 UV 레이저를 이용한 얇은 Si 웨이퍼 다이싱 및 드릴링 시스템에 대해 소개하고, 웨이퍼 다이싱 및 드릴링 실험결과를 바탕으로 적절한 레이저 및 공정 매개변수에 대해 설명한다.

• Journal of the Korean Society of Manufacturing Technology Engineers
• /
• v.9 no.1
• /
• pp.119-127
• /
• 2000

In this study the classified researches the artificial and natural flaws in welding parts are performed using the pattern recognition technology. For this purpose the signal pattern recognition package including the user defined function was developed and the total procedure including the digital signal processing feature extraction feature selection and classifi-er selection is teated by bulk,. Specially it is composed with and discussed using the statistical classifier such as the linear discriminant function the empirical Bayesian classifier. Also the pattern recognition technology is applied to classifica-tion problem of natural flaw(i.e multiple classification problem-crack lack of penetration lack of fusion porosity and slag inclusion the planar and volumetric flaw classification problem), According to this result it is possible to acquire the recognition rate of 83% above even through it is different a little according to domain extracting the feature and the classifier.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1993.11a
• /
• pp.49-54
• /
• 1993

This paper discusses the reliability of solder joints of electronic devices on printed circuit board. Solder application is usually done by screen printing method for the bonding between outer leads of devices and thick film(Ag/Pd) pattern on Hybrid IC as wel1 as Cu lands on PCB. As result of thermal stresses generated at the solder joints due to the differences of thermal expansion coefficients between packge body and PCB, Micro cracking often occurs due to thermal fatigue failure at solder joints. The initiation and the propagate of solder joint crack depends on the environmental conditions, such as storage temperature and thermal cycling. The principal mechanisms of the cracking pheno- mana are the formation of kirkendal void caused by the differences in diffusion rate of materials, ant the thermal fatigue effect due to the differences of thermal expansion coefficient between package body and PCB. Finally, This paper experimentally shows a way to supress solder joints cracks by using low-${\alpha}$ PCB and the packages with thin lead frame, and investigates the phenomena of diffusion near the bonding interfaces.

• Journal of Applied Reliability
• /
• v.16 no.4
• /
• pp.347-355
• /
• 2016

Purpose: With the advance of miniaturization of electronic products, stacked packages of high density semiconductors are commonly used. Potential failure modes and mechanisms of stacked packages are identified. Methods: Failure modes and mechanisms of thin chip stacked packages are determined through the categorization and failure analysis: delamination, non-wet, crack, ESD, EMI and the process related damages. Results: Those failure modes are not easy to find and require excessive amount time and effort for analysis and subsequent improvement. Conclusion: In this study, a method of estimating the failure rate based on the strength measurement is suggested.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2002.10a
• /
• pp.345-350
• /
• 2002

In this study, researchers classifying the artificial flaws in semiconductor packages are performed by pattern recognition technology. For this purposes, image pattern recognition package including the user made software was developed and total procedure including ultrasonic image acquisition, equalization filtration, binary process, edge detection and classifier design is treated by Backpropagation Neural Network. Specially, it is compared with various weights of Backpropagation Neural Network and it is compared with threshold level of edge detection in preprocessing method fur entrance into Multi-Layer Perceptron(Backpropagation Neural network). Also, the pattern recognition techniques is applied to the classification problem of defects in semiconductor packages as normal, crack, delamination. According to this results, it is possible to acquire the recognition rate of 100% for Backpropagation Neural Network.

• Journal of Applied Reliability
• /
• v.7 no.1
• /
• pp.1-11
• /
• 2007

This paper presents a derating design approach for reliability improvement of a regulator IC. The IC is usually used in SMPS. The main failure mechanism of interest is voltage drop due to the package delamination mainly caused by two stresses, i.e. temperature and current. The lifetime under stresses is modeled as a function of stresses and time using accelerating life testings. Quantitative and qualitative variation in lifetime according to stress variations are investigated using the modeled lifetime. Stress levels would be determined to achieve required reliability levels in the aspect of derating design for reliability.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2005.10a
• /
• pp.721-726
• /
• 2005

In this study, researchers classifying the artificial flaws in semiconductor. packages are performed by pattern recognition technology. For this purposes, image pattern recognition package including the user made software was developed and total procedure including ultrasonic image acquisition, equalization filtration, binary process, edge detection and classifier design is treated by Backpropagation Neural Network. Specially, it is compared with various weights of Backpropagation Neural Network and it is compared with threshold level of edge detection in preprocessing method for entrance into Multi-Layer Perceptron(Backpropagation Neural network). Also, the pattern recognition techniques is applied to the classification problem of defects in semiconductor packages as normal, crack, delamination. According to this results, it is possible to acquire the recognition rate of 100% for Backpropagation Neural Network.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.20 no.4
• /
• pp.1309-1319
• /
• 1996

The research for the classification of the natural defects in welding zone is performd using the neuro-pattern recognition technology. The signal pattern recognition package including the user's defined function is developed to perform the digital signal processing, feature extraction, feature selection and classifier selection, The neural network classifier and the statistical classifiers such as the linear discriminant function classifier and the empirical Bayesian calssifier are compared and discussed. The neuro-pattern recognition technique is applied to the classificaiton of such natural defects as root crack, incomplete penetration, lack of fusion, slag inclusion, porosity, etc. If appropriately learned, the neural network classifier is concluded to be better than the statistical classifiers in the classification of the natural welding defects.

• Journal of the Microelectronics and Packaging Society
• /
• v.13 no.1 s.38
• /
• pp.63-72
• /
• 2006

Mobile products, such as cellular phones, PDA and notebook, are subjected to many different mechanical loads, which include bending, twisting, impact shock and vibration. In this study, a cyclic bending test of the BGA package was performed to evaluate the fatigue life. Special bending tester, which was suitable for electronic package, was developed using an electromagnetic actuator. A nonlinear finite element model was used to simulate the mechanical bending deformation of solder joint in BGA packages. The fatigue life of lead-free (95.5Sn4.0Ag0.5Cu) solder joints was compared with that of lead-contained (63Sn37Pb). When the applied load to the specimen is small, the lead-free solder has longer fatigue life than lead-contained solder. The fatigue crack is initialized at the exterior solder joints and is propagated into the inner solder joints.