• 대한전자공학회논문지SD
• /
• 제44권2호
• /
• pp.7-12
• /
• 2007

고휘도 LED(Light-Emitting Diode)를 구현하기 위한 칩 설계의 최적화에 이용할 수 있는 SPICE 기반의 LED 3차원 회로 모델을 개발하였다. 본 모델은 LED를 일정한 면적의 픽셀로 구획하고, 각각의 픽셀은 n-전극, n-형 반도체, p-형 반도체, 및 p-전극 등의 일반적인 LED 레이어 구조를 반영하는 회로망으로 나타낸다. 개별의 박막 층과 접촉 저항은 저항 네트웍으로, pn-접합부는 일반적인 pn-접합 다이오드로 각각 모델링 한다. 별도의 테스트 패턴을 이용하여 독립적으로 추출한 파라미터를 이용한 시뮬레이션 결과는 실험 결과와 정확하게 일치함을 확인하였다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
• /
• pp.793-796
• /
• 2003

The electronics of a mobile robot ill nuclear facilities is required to satisfied the reliability to sustain survival in its radiation environment. To know how much radiation the robot has been encountered to replace sensitive electronic parts, a dosimeter to measure total accumulated dose is necessary. Among many radiation dosimeters or detectors, semiconductor radiation sensors have advantages in terms of power requirements and their sires over conventional detectors. This paper describes the use of the radiation-induced threshold voltage change of a commercial power pMOSFET as an accumulated radiation dose monitoring mean and that of the photo-current of a commercial PIN Diode as a dose-rate measurement mean. Commercial p-type power MOSFETs and PIN Diodes were tested in a Co-60 gamma irradiation facility to see their capabilities as radiation sensors. We found an inexpensive commercial power pMOSFET that shows good linearity in their threshold voltage shift with radiation dose and a PIN diode that shows good linearity in its photo-current change with dose-rate. According to these findings, a radiation hardened hybrid electronic radiation dosimeter for nuclear robots has been developed for the first time. This small hybrid dosimeter has also an advantage in the point of view of reliability improvement by using a diversity concept.

• 대한전자공학회논문지SD
• /
• 제45권4호
• /
• pp.137-145
• /
• 2008

본 논문에서는 출력 단 전달 스위치로 NMOS와 PMOS를 병렬 결합하여 사용하고 벌크 펌핑 회로를 채용한 CMOS 전하펌프를 제안하였다. 제안된 전하 펌프는 NMOS 및 PMOS의 병렬 결합을 통하여 출력 단의 전류전달 능력을 향상시킬 수 있다. 또한, 채용된 벌크 펌핑 회로는 PMOS에 의한 벌크의 순방향 바이어스 문제를 효과적으로 해결할 수 있다. 제안된 회로의 성능을 확인하기 위하여, 80-nm CMOS 공정기술을 이용하여 전하 펌프를 설계하였다. 모사실험을 통한 비교 결과, 제안된 CMOS 전하 펌프는 기존의 NMOS 혹은 PMOS 만을 사용한 전하 펌프들과 비교하여 47% 이상의 전류전달 능력의 향상을 가져왔고 펌핑 속도도 9% 이상 개선되었으며, 동작 시 최대 벌크 순방향 전압 또한 24%이상 개선되어 벌크 순방향 바이어스 문제가 완화되었음을 확인하였다.

• 한국태양에너지학회:학술대회논문집
• /
• 한국태양에너지학회 2012년도 춘계학술발표대회 논문집
• /
• pp.243-247
• /
• 2012

The paper focuses on an anti-reflection (AR) coating deposited by PECVD in silicon solar cell fabrication. AR coating is effective to reduce the reflection of the light on the silicon wafer surface and then increase substantially the solar cell conversion efficiency. In this work, we carried out experiments to optimize double AR coating layer with silicon nitride and silicon oxide for the silicon solar cells. The p-type mono crystalline silicon wafers with $156{\times}156mm^2$ area, 0.5-3 ${\Omega}{\cdot}cm$ resistivity, and $200{\mu}m$ thickness were used. All wafers were textured in KOH solution, doped with $POCl_3$ and removed PSG before ARC process. The optimized thickness of each ARC layer was calculated by theoretical equation. For the double layer of AR coating, silicon nitride layer was deposited first using $SiH_4$ and $NH_3$, and then silicon oxide using $SiH_4$ and $N_2O$. As a result, reflectance of $SiO_2/SiN_x$ layer was lower than single $SiN_x$ and then it resulted in increase of short-circuit current and conversion efficiency. It indicates that the double AR coating layer is necessary to obtain the high efficiency solar cell with PECVD already used in commercial line.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.154-154
• /
• 2012

Flexible complementary inverters based on thin-film transistors (TFTs) are important because they have low power consumption and high voltage gain compared to single type circuits. We have manufactured flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The circuits were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. The characteristics of TFTs and inverters were evaluated at different bending radii. The applied strain led to change in voltage transfer characteristics of complementary inverters as well as source-drain saturation current, field effect mobility and threshold voltage of TFTs. The switching threshold voltage of fabricated inverters was decreased with increasing bending radius, which is related to change in parameters of TFTs. Throughout the bending experiments, relationship between circuit performance and TFT characteristics under mechanical deformation could be elucidated.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2011년도 제40회 동계학술대회 초록집
• /
• pp.479-479
• /
• 2011

Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

• 한국산학기술학회논문지
• /
• 제19권3호
• /
• pp.576-583
• /
• 2018

탄화규소는 실리콘과 비교시 큰 에너지 밴드 갭을 갖고, 불순물 도핑에 의해 p형 및 n형 전도의 제어가 용이해서 고온용 전자부품 소재로 활용이 가능한 재료이다. 특히 ${\beta}$-SiC 분말로부터 제조한 다공질 n형 SiC 세라믹스의 경우, $800{\sim}1000^{\circ}C$에서 높은 열전 변환 효율을 나타내었다. SiC 열전 변환 반도체를 응용하기 위해서는 변환 성능지수도 중요하지만 $800^{\circ}C$ 이상에서 사용할 수 있는 고온용 금속전극 또한 필수적이다. 일반적으로 세라믹스는 대부분의 보편적인 용접용 금속과는 우수한 젖음을 갖지 못 하지만, 활성 첨가물을 고용시킨 합금의 경우, 계면 화학종들의 변화가 가능해서 젖음과 결합의 정도를 증진시킬 수 있다. 액체가 고체 표면을 적시면 액체-고체간 접합면의 에너지는 고체의 표면에너지 보다 작아지고 그 결과 액체가 고체 표면에서 넓게 퍼지면서 모세 틈새로 침투할 수 있는 구동력을 갖게 된다. 따라서 본 연구에서는 비교적 낮은 융점을 갖는 Ag를 이용해서 다공질 SiC 반도체 / Ag 및 Ag 합금 / SiC 및 알루미나 기판간의 접합에 대해 연구하였고, Ag-20Ti-20Cu 필러 메탈의 경우 SiC 반도체의 고온용 전극으로 적용 가능할 것으로 나타났다.

• 센서학회지
• /
• 제24권4호
• /
• pp.219-223
• /
• 2015

Indium free consisting of three alternating layers GTO/Ag/GTO has been fabricated by radio-frequency (RF) sputtering for the applications as transparent conducting electrodes and the structural, electrical and optical properties of the gallium tin oxide (GTO) films were carefully studied. The gallium tin oxide thin films deposited at room temperature are found to have an amorphous structure. Hall Effect measurements show a strong influence on the conductivity type where it changed from n-type to p-type at $700^{\circ}C$. GTO/Ag/GTO multilayer structured electrode with a few nm of Ag layer embedded is fabricated and show the optical transmittance of 86.48% in the visible range (${\lambda}$ = 380~770 nm) and quite low electrical resistivity of ${\sim}10^{-5}{\Omega}cm$. The resultant power conversion efficiency of 2.60% of the multilayer based OPV (GAG) is lower than that of the reference commercial ITO. GTO/Ag/GTO multilayer is a promising transparent conducting electrode material due to its low resistivity, high transmittance, low temperature deposition and low cost components.

• Applied Science and Convergence Technology
• /
• 제24권3호
• /
• pp.72-76
• /
• 2015

Nickel oxide (NiO) thin films were grown on soda-lime glass substrates by RF magnetron sputtering method at room temperature (RT), and they were post-annealed at the temperatures of $100^{\circ}C$, $200^{\circ}C$, $300^{\circ}C$ and $400^{\circ}C$ for 30 minutes in vacuum. The electronic structure, optical and electrical properties of NiO thin films were investigated using X-ray photoelectron spectroscopy (XPS), reflection electron energy spectroscopy (REELS), UV-spectrometer and Hall Effect measurements, respectively. XPS results showed that the NiO thin films grown at RT and post annealed at temperatures below $300^{\circ}C$ had the NiO phase, but, at $400^{\circ}C$, the nickel metal phase became dominant. The band gaps of NiO thin films post annealed at temperatures below $300^{\circ}C$ were about 3.7 eV, but that at $400^{\circ}C$ should not be measured clearly because of the dominance of Ni metal phase. The NiO thin films post-annealed at temperatures below $300^{\circ}C$ showed p-type conductivity with low electrical resistivity and high optical transmittance of 80% in the visible light region, but that post-annealed at $400^{\circ}C$ showed n-type semiconductor properties, and the average transmittance in the visible light region was less than 42%. Our results demonstrate that the post-annealing plays a crucial role in enhancing the electrical and optical properties of NiO thin films.

• 센서학회지
• /
• 제29권6호
• /
• pp.420-426
• /
• 2020

A metal oxide semiconductor gas sensor is operated by measuring the changes in resistance that occur on the surface of nanostructures for gas detection. ZnO, which is an n-type metal oxide semiconductor, is widely used as a gas sensor material owing to its high sensitivity. Various ZnO nanostructures in gas sensors have been studied with the aim of improving surface reactions. In the present study, the sol-gel and vapor phase growth techniques were used to fabricate nanostructures to improve the sensitivity, response, and recovery rate for gas sensing. The sol-gel method was used to synthesize SnO₂ nanoparticles, which were used as the seed layer. The nanoparticles size was controlled by regulating the process parameters of the solution, such as the pH of the solution, the type and amount of solvent. As a result, the SnO₂ seed layer suppressed the aggregation of the nanostructures, thereby interrupting gas diffusion. The ZnO nanostructures with a sol-gel processed SnO₂ seed layer had larger specific surface area and high sensitivity. The gas response and recovery rate were 1-7 min faster than the gas sensor without the sol-gel process. The gas response increased 4-24 times compared to that of the gas sensor without the sol-gel method.