• Title/Summary/Keyword: output-coupling power

Search Result 235, Processing Time 0.027 seconds

Design of Power Detection Block for Wireless Communication Transmitter Systems (무선통신 송신시스템용 전력검출부 설계)

  • Hwang, Mun-Su;Koo, Jae-Jin;Ahn, Dal;Lim, Jong-Sik
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.8 no.5
    • /
    • pp.1000-1006
    • /
    • 2007
  • This paper presents a power detector circuit which monitors the transmitting power for the application in CDMA cell phones. The proposed power detector are composed of coupler for coupling output power and detector fur monitoring output power. The designed coupler has low loss characteristic because it adopts the stripline structure which consists of two ground planes at both sides of signal plane. The design frequency is 824-849MHz which is the Tx band fur CDMA mobile terminal, and the coupling factor of the stripline coupler is -20dB. A schottky barrier diode is adopted for detector design because of its high speed operation with minimized loss. The required impedance matching is performed to improve the linearity and sensitivity of output voltage at relatively low detector input level where the nonlinear characteristic of diode exists. The package parasitics as well as intrinsic diode model are considered for simulation of the detector. The predicted performances agree well with the measured results.

  • PDF

A Quadrature VCO Exploiting Direct Back-Gate Second Harmonic Coupling

  • Oh, Nam-Jin
    • Journal of electromagnetic engineering and science
    • /
    • v.8 no.3
    • /
    • pp.134-137
    • /
    • 2008
  • This paper proposes a novel quadrature VCO(QVCO) based on direct back-gate second harmonic coupling. The QVCO directly couples the current sources of the conventional LC VCOs through the back-gate instead of front-gate to generate quadrature signals. By the second harmonic injection locking, the two LC VCOs can generate quadrature signals without using on-chip transformer, or stability problem that is inherent in the direct front-gate second harmonic coupling. The proposed QVCO is implemented in $0.18{\mu}m$ CMOS technology operating at 2 GHz with 5.0 mA core current consumption from 1.8 V power supply. The measured phase noise of the proposed QVCO is - 63 dBc/Hz at 10 kHz offset, -95 dBc/Hz at 100 kHz offset, and -116 dBc/Hz at 1 MHz offset from the 2 GHz output frequency, respectively. The calculated figure of merit(FOM) is about -174 dBc/Hz at 1 MHz offset. The measured image band rejection is 46 dB which corresponds to the phase error of $0.6^{\circ}$.

Design of Contactless Power Transmission Device Using Cavity Resonator (공동공진기를 이용한 무접점 전력 전송 장치 설계)

  • Chang, Tae-Soon;Kim, Yong-Nam;Hur, Jung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.22 no.11
    • /
    • pp.1025-1033
    • /
    • 2011
  • In this paper, we introduce the contactless power transmission device for transmitting the power with the resonant characteristic of the cavity resonator. When transmitting the power, the contactless power transmission device begins to work in the condition where the transceiver adheres closely. The transceiver is electrically separated because there is no conductive terminal outside and the size of the receiver required for the electric power transmission can be minimized. The cavity resonator comprises slots for the input port and output port in the upper side conductor plate of the cavity and forms the input port and output port using the stripline structure at this upper part. The some of output port is separated from it and the electric power receiver is formed thus the union can be possible. The rest except electric power receiver become the electric power transmitter, which includes the input port of stripline-slot coupling, cavity, and the slot of the output port. If the transmitter and the receiver are combined, they become the form in which the electricity is transferred from the input port to the output port in a cavity resonator. The center frequency of the contactless power transmitter manufactured is 5.782 GHz. and $S_{21}$ is measured as -1.07 dB. It is confirmed that the high electric power transfer rate is approximately 78 %.

New Modeling Method for an Electrodeless Fluorescent Lamp Using the Relation of Lamp Output Power and the Modeling Coefficients of the Lamp (무전극램프의 출력전력 변화에 따른 새로운 모델링 기법)

  • Lim, Byoung-Noh;Jang, Mog-Soon;Sin, Dong-Seok;Park, Chong-Yeun
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.56 no.9
    • /
    • pp.1626-1631
    • /
    • 2007
  • This paper presents a new modeling method using lamp output power and the modeling coefficients of the lamp. The proposed method utilizes the lamp modeling coefficients such as equivalent impedance Z(p), coupling coefficient of the transformer k(p), turns ratio of the transformer n(p), and plasma resistance Rp(p) as a function of lamp output power. The equivalent impedance Z(p) was developed from the equivalent resistance Req(p) and equivalent inductance Leq(p) of the lamp. Simulation and experimental results of the proposed model are presented in order to validate the proposed method. The modeling method can use to design an impedance matching circuit for a Class-D inverter.

Droop Method for High-Capacity Parallel Inverters in Islanded Mode Using Virtual Inductor (독립운전 모드에서 가상 인덕터를 활용한 대용량 인버터 병렬운전을 위한 드룹제어)

  • Jung, Kyo-Sun;Lim, Kyung-Bae;Kim, Dong-Hwan;Choi, Jaeho
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.20 no.1
    • /
    • pp.81-90
    • /
    • 2015
  • This paper investigates the droop control-based real and reactive power load sharing with a virtual inductor when the line impedance between inverter and Point of Common Coupling (PCC) is partly and unequally resistive in high-capacity systems. In this paper, the virtual inductor method is applied to parallel inverter systems with resistive and inductive line impedance. Reactive power sharing error has been improved by applying droop control after considering each line impedance voltage drop. However, in high capacity parallel systems with large output current, the reference output voltage, which is the output of droop controller, becomes lower than the rated value because of the high voltage drop from virtual inductance. Hence, line impedance voltage drop has been added to the droop equation so that parallel inverters operate within the range of rated output voltage. Additionally, the virtual inductor value has been selected via small signal modeling to analyze stability in transient conditions. Finally, the proposed droop method has been verified by MATLAB and PSIM simulation.

Analyzing the Impact of Supply Noise on Jitter in GBPS Serial Links on a Merged I/O-Core Power Delivery Network

  • Tan, Fern-Nee;Lee, Sheng Chyan
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.20 no.4
    • /
    • pp.69-74
    • /
    • 2013
  • In this paper, the impact of integrating large number of I/O (Input-Output) and Core power Delivery Network (PDN) on a 6 layers Flip-Chip Ball Grid Array (FCBGA) package is investigated. The impact of core induced supply noise on high-speed I/O interfaces, and high-speed I/O interface's supply noise coupling to adjacent high-speed I/O interfaces' jitter impact are studied. Concurrent stress validation software is used to induce SSO noise on each individual I/O interfaces; and at the same time; periodic noise is introduced from Core PDN into the I/O PDN domain. In order to have the maximum coupling impact, a prototype package is designed to merge the I/O and Core PDN as one while impact on jitter on each I/O interfaces are investigated. In order to understand the impact of the Core to I/O and I/O to I/O noise, the on-die noise measurements were measured and results were compared with the original PDN where each I/O and Core PDN are standalone and isolated are used as a benchmark.

LTCC-based transformer design for output stage of differential RF power amplifiers (차동 전력증폭기 출력단용 LTCC 기반 RF 트랜스포머 설계)

  • Jewook Woo;Heesu Kim;Jooyoung Jeon
    • Journal of IKEEE
    • /
    • v.27 no.1
    • /
    • pp.53-58
    • /
    • 2023
  • In this paper, a Radio Frequency (RF) transformer (TF) based on LTCC (Low Temperature Co-fired Ceramic) for the output stage of differential power amplifiers is presented. Instead of using an usual L-C matching circuit, a small-sized transformer was implemented on the LTCC board and the results were verified through simulation. For reduced size and better performance, a TF using more metal layers was implemented and compared with the existing TF through simulation. As a result of comparison, the proposed TF has an area reduced by 55% and a coupling coefficient increased by 25%, and insertion loss improvement of about 0.4dB at 5GHz was confirmed.

Design of Single Power CMOS Beta Ray Sensor Reducing Capacitive Coupling Noise (커패시터 커플링 노이즈를 줄인 단일 전원 CMOS 베타선 센서 회로 설계)

  • Jin, HongZhou;Cha, JinSol;Hwang, ChangYoon;Lee, DongHyeon;Salman, R.M.;Park, Kyunghwan;Kim, Jongbum;Ha, PanBong;Kim, YoungHee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.14 no.4
    • /
    • pp.338-347
    • /
    • 2021
  • In this paper, the beta-ray sensor circuit used in the true random number generator was designed using DB HiTek's 0.18㎛ CMOS process. The CSA circuit proposed a circuit having a function of selecting a PMOS feedback resistor and an NMOS feedback resistor, and a function of selecting a feedback capacitor of 50fF and 100fF. And for the pulse shaper circuit, a CR-RC2 pulse shaper circuit using a non-inverting amplifier was used. Since the OPAMP circuit used in this paper uses single power instead of dual power, we proposed a circuit in which the resistor of the CR circuit and one node of the capacitor of the RC circuit are connected to VCOM instead of GND. And since the output signal of the pulse shaper does not increase monotonically, even if the output signal of the comparator circuit generates multiple consecutive pulses, the monostable multivibrator circuit is used to prevent signal distortion. In addition, the CSA input terminal, VIN, and the beta-ray sensor output terminal are placed on the top and bottom of the silicon chip to reduce capacitive coupling noise between PCB traces.

Transformer Design Methodology to Improve Transfer Efficiency of Balancing Current in Active Cell Balancing Circuit using Multi-Winding Transformer (다중권선 변압기를 이용한 능동형 셀 밸런싱 회로에서 밸런싱 전류 전달 효율을 높이기 위한 변압기 설계 방안)

  • Lee, Sang-Jung;Kim, Myoung-Ho;Baek, Ju-Won;Jung, Jee-Hoon
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.23 no.4
    • /
    • pp.247-255
    • /
    • 2018
  • This paper proposes a transformer design of a direct cell-to-cell active cell balancing circuit with a multi-winding transformer for battery management system (BMS) applications. The coupling coefficient of the multi-winding transformer and the output capacitance of MOSFETs significantly affect the balancing current transfer efficiency of the cell balancing operation. During the operation, the multi-winding transformer stores the energy charged in a specific source cell and subsequently transfers this energy to the target cell. However, the leakage inductance of the multi-winding transformer and the output capacitance of the MOSFET induce an abnormal energy transfer to the non-target cells, thereby degrading the transfer efficiency of the balancing current in each cell balancing operation. The impacts of the balancing current transfer efficiency deterioration are analyzed and a transformer design methodology that considers the coupling coefficient is proposed to enhance the transfer efficiency of the balancing current. The efficiency improvements resulting from the selection of an appropriate coupling coefficient are verified by conducting a simulation and experiment with a 1 W prototype cell balancing circuit.

Operational Properties of Ridge Waveguide Lasers with Laterally Tapered Waveguides for Monolithic Integration

  • Kwon, Oh-Kee;Kim, Ki-Soo;Sim, Jae-Sik;Baek, Yong-Soon
    • ETRI Journal
    • /
    • v.29 no.6
    • /
    • pp.811-813
    • /
    • 2007
  • We report on a ridge waveguide laser diode with laterally tapered waveguides fabricated in a single growing step using a double patterning method. In this structure, nearly constant output power is obtained with the change of the lower tapered waveguide width, and the facet power ratio of 1.4 to 1.5 is observed over the current range. The asymmetric facet power property is also investigated.

  • PDF