• Title/Summary/Keyword: oscillator phase noise

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A Novel Oscillator Utilizing Corrugated CPW EBG Structure with Reduced Phase Noise and Improved Harmonic Characteristics (Corrugated CPW EBG 구조를 이용한 낮은 위상잡음과 향상된 고조파 특성을 갖는 새로운 형태의 발진기)

  • Hwang, Cheol-Gyu;Myung, Noh-Hoon
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2005.11a
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    • pp.101-106
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    • 2005
  • This paper presents a new microwave oscillator incorporating a corrugated coplanar waveguide (CCPW) electromagnetic bandgap (EBG) structure as its terminating resonance component. The use of a compact CCPW EBG structure was effective in reducing the phase noise and improving the harmonic characteristics of the microwave oscillator circuit without additional backside processing and drastic size increment. The fully planar CCPW oscillator oscillating at the frequency of 5.41 GHz showed a phase noise characteristic of -90.7 dBc/Hz at 100kHz offset and a second harmonic suppression of 42.67 dB.

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Analysis of Phase Noise of High Stable Microwave Phased Locked Oscillator with Gate Voltage Tunning (게이트 전압 제어에 의한 마이크로파 고안정 위상동기발진기의 위상잡음 특성 분석)

  • 김성용;이영철
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.5
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    • pp.863-871
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    • 2003
  • In this paper, we design a high stable Ku-band phase-locked dielectric resonant microwave oscillator with the gate voltage controls of p-HEMT. By adapting the nonlinear equivalent elements which affects phase noise of microwave oscillator, we optimize the nonlinear elements of p-HEMT to have low phase noise operation. Using the scattering parameters according to bias voltages, we designed the gate voltage control microwave dielectric resonant oscillator and phase-locked loop circuits is applied to have the high stable operations. Designed microwave oscillator as a local oscillator of digital microwave communication shows that output power is 9.17dBm at 10.75GHz and it's phase noise is -88dBc/Hz at 10KHz offset frequency.

A Study on Phase-Noise and Jitter due to the Power Supply Noise of the CMOS Ring Oscillator (CMOS 링발진기의 전원 잡음에 의한 위상잡음과 Jitter 연구)

  • Park Se-Hoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.2
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    • pp.298-302
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    • 2006
  • Models for the phase noise and jitter of the ring oscillator with the power supply noise are suggested and verified by simulations. The power supply noise is converted into the phase-noise by the narrow band phase modulation. The phase-noise appears as sideband frequencies apart from the center frequency of the ring oscillator as much as the frequency of the power supply noise. A jitter model describing the linear relation of jitter with the amplitude of the power supply noise is suggested and verified by simulation.

Phase Noise Analysis of 2.4 GHz PLL using SPD (SPD를 이용한 2.4 GHz PLL의 위상잡음 분석)

  • Chae, Myeoung-ho;Kim, Jee-heung;Park, Beom-jun;Lee, Kyu-song
    • Journal of the Korea Institute of Military Science and Technology
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    • v.19 no.3
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    • pp.379-386
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    • 2016
  • In this paper, phase noise analysis result for 2.4 GHz PLL(phase locked loop) using SPD(sample phase detector) is proposed. It can be used for high performance frequency synthesizer's LO(local oscillator) to extend output frequency range or for LO of offset PLL to reduce a division rate or for clock signal of DDS(direct digital synthesizer). Before manufacturing, theoretical estimation of PLL's phase noise performance should be performed. In order to calculate phase noise of PLL using SPD, Leeson model is used for modeling phase noise of VCO(voltage controlled oscillator) and OCXO(ovened crystal oscillator). After theoretically analyzing phase noise of PLL, optimized loop filter bandwidth was determined. And then, phase noise of designed loop filter was calculated to find suitable OP-Amp. Also, the calculated result of phase noise was compared with the measured one. The measured phase noise of PLL was -130 dBc/Hz @ 10 kHz.

RF Oscillator Improved Characteristics of Phase Noise Using Ring type DGS (위상잡음을 개선한 링형 DGS 공진기를 이용한 RF 발진기)

  • Kim, Gi-Rae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.8
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    • pp.1581-1586
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    • 2012
  • In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8GHz, 7.6dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. The phase noise characteristics of oscillator is improved about 9.5dB compared to one using the general ${\lambda}/4$ microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of ring type DGS, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed ring type DGS resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Analysis of PLL Phase Noise Effect for High Data-rate Underwater Communications

  • Lee, Chong-Hyun;Bae, Jin-Ho;Hwang, Chang-Ku;Lee, Seung-Wook;Shin, Jung-Chae
    • International Journal of Ocean System Engineering
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    • v.1 no.4
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    • pp.205-210
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    • 2011
  • High data-rate underwater communications is demanded. This demand imposes stringent requirements on underwater communication equipment of phase-locked-loop (PLL). Phase noise in PLL is unwanted and unavoidable. In this paper, we investigate the PLL phase noise effect on high order QAM for underwater communication systems. The phase noise model using power spectral density is adopted for performance evaluation. The phase noise components considered in PLL are reference oscillator, voltage controlled oscillator (VCO), filter and divider. The filters in PLL noise are assumed to be second order active and passive low pass filters. Through simulation, we analyze the phase noise characteristics of the four components and then investigate the performance improvement factor of each component. Consequently, we derive specifications of VCO, phase detector, divider to meet performance requirement of high data-rate communication using QAM under phase noise influence.

A Study on Configuration of Extremely Low Phase Noise Oscillator Circuit

  • Sakuta, Yukinori;Arai, Yuji;Sekine, Yoshifumi
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.1196-1199
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    • 2002
  • The low phase noise frequency source to be used for measurements and so on realizes by oscillator having highly output signal power against output noise power. SAW devices can be used by high power than BAW devices. So we examine on configuration of SAW oscillator circuits with the power gain. In this paper we shall discuss a configuration of oscillator circuit to obtain an extremely low phase noise and an oscillator operating at a non-reactive frequency of SAW resonator.

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A Current Compensating Scheme for Improving Phase Noise Characteristic in Phase Locked Loop

  • Han, Dae Hyun
    • Journal of Multimedia Information System
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    • v.5 no.2
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    • pp.139-142
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    • 2018
  • This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise characteristic. The proposed PLL has two charge pumps (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppresses the voltage fluctuation of LF. The PLL has a novel voltage controlled oscillator (VCO) consisting of a voltage controlled resistor (VCR) and the three-stage ring oscillator with latch type delay cells. The VCR linearly converts voltage into current, and the latch type delay cell has short active on-time of transistors. As a result, it improves phase noise characteristic. The proposed PLL has been fabricated with $0.35{\mu}m$ 3.3 V CMOS process. Measured phase noise at 1 MHz offset is -103 dBc/Hz resulting in 3 dBc/Hz phase noise improvement compared to the conventional PLL.

The Effect of Phase Noise from PLL Frequency Synthesizer on 64QAM System Performance (주파수 합성기에서 발생하는 위상잡음이 64QAM 시스템 성능에 미치는 영향)

  • 최정수;박성도;김기문;조형래
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.05a
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    • pp.217-221
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    • 2000
  • In this paper, we analyze the effect of phase noise from PLL frequency synthesizer on 64QAM when detecting the corrupted signals. To predict the phase noise of oscillator very accurately, we considered that oscillator has the linearly time-varying nature when the input impulsive torrent to oscillator is small. The performance which detects the corrupted signal by oscillator phase noise is compared with only affected by AWCN and then analyze how much it degrade system performance for 64QAM.

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A Very Low Phase Noise Oscillator with Double H-Shape Metamaterial Resonator (이중 H자 메타 전자파구조를 이용한 저위상잡음 발진기)

  • Lee, Chong-Min;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.2
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    • pp.62-66
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    • 2010
  • In this article, a oscillator at X-band with a double H-shape metamaterial resonator (DHMR) based on high-Q is proposed with metamaterial structure to improve Ihe phase noise and output power. The proposed oscillator is required low phase noise and high output power for the high performance frequency synthesizer. DHMR is designed to be high-Q at resonance frequency through strong coupling of E-field. This character makes phase noise excellent. The oscillator using DHMR is oscillated in X-band so as to apply frequency synthesizer of radar systems. The output power is 4.33 dBm and the phase noise is -108 dBc/Hz at 100 kHz offset of carrier frequency.