• Title/Summary/Keyword: oscillator phase noise

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10-GHz Band Voltage Controlled Oscillator (VCO) MMIC for Motion Detecting Sensors

  • Kim, Sung-Chan;Kim, Yong-Hwan;Ryu, Keun-Kwan
    • Journal of information and communication convergence engineering
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    • v.16 no.1
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    • pp.12-16
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    • 2018
  • In this work, a voltage controlled oscillator (VCO) monolithic microwave integrated circuit (MMIC) was demonstrated for 10-GHz band motion detecting sensors. The VCO MMIC was fabricated using a $2-{\mu}m$ InGap/GaAs HBT process, and the tuning of the oscillation frequency is achieved by changing the internal capacitance in the HBT, instead of using extra varactor diodes. The implemented VCO MMIC has a micro size of $500{\mu}m{\times}500{\mu}m$, and demonstrates the value of inserting the VCO into a single chip transceiver. The experimental results showed that the frequency tuning characteristic was above 30 MHz, with the excellent output flatness characteristic of ${\pm}0.2dBm$ over the tuning bandwidth. And, the VCO MMIC exhibited a phase noise characteristic of -92.64 dBc/Hz and -118.28 dBc/Hz at the 100 kHz and 1 MHz offset frequencies from the carrier, respectively. The measured values were consistent with the design values, and exhibited good performance.

A 2.4GHz Back-gate Tuned VCO with Digital/Analog Tuning Inputs (디지털/아날로그 입력을 통한 백게이트 튜닝 2.4 GHz VCO 설계)

  • Oh, Beom-Seok;Lee, Dae-Hee;Jung, Wung
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.234-238
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    • 2003
  • In this work, we have designed a fully integrated 2.4GHz LC-tuned voltage-controlled oscillator (VCO) with multiple tuning inputs for a $0.25-{\mu}m$ standard CMOS Process. The design of voltage-controlled oscillator is based on an LC-resonator with a spiral inductor of octagonal type and pMOS-varactors. Only two metal layer have been used in the designed inductor. The frequency tuning is achieved by using parallel pMOS transistors as varactors and back-gate tuned pMOS transistors in an active region. Coarse tuning is achieved by using 3-bit pMOS-varactors and fine tuning is performed by using back-gate tuned pMOS transistors in the active region. When 3-bit digital and analog inputs are applied to the designed circuits, voltage-controlled oscillator shows the tuning feature of frequency range between 2.3 GHz and 2.64 GHz. At the power supply voltage of 2.5 V, phase noise is -128dBc/Hz at 3MHz offset from the carrier, Total power dissipation is 7.5 mW.

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Implementation of A Dielectric-Resonator Oscillator for the Microwave Radar Sensor Applications (마이크로파 레이더 센서 응용을 위한 발진기 설계 및 제작)

  • Kim, Kang-Wook
    • Journal of Sensor Science and Technology
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    • v.12 no.4
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    • pp.185-190
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    • 2003
  • Recently, sensors which use the infrared light, supersonic waves, and electromagnetic waves have been used for many applications to detect information of the object. For these sensors, the accompanying system which utilizes the sensor should be systematically developed. In this paper, a general microwave radar sensor system is briefly described, and then basic applications of a CW doppler radar sensor system are introduced. For the CW doppler radar sensor applications, a highly-stable, low-cost Dielectric Resonator Oscillator (DRO) has also been designed and implemented, which can be used for commercial microwave sensor systems. The implemented DRO has output power of +5.33 dBm at 12.67 GHz and phase noise of -108.5 dBc/Hz at the 100 kHz offset frequency.

Design of Subharmonic Injection Locked Oscillator (부고조파를 이용한 X-band 주입 동기 발진기 설계 및 제작)

  • 전영상;이문규;남상욱
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.5
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    • pp.653-662
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    • 1999
  • In this paper, subharmonically injection locked oscillator(SILO) was designed and measured. SILO with series feedback was designed using Two Signal Method(TSM). The free-running oscillator frequency was 9.4 GHz with 6 dBm output power. In case of injection, the multiplied injected signal locked the free-running frequency. The locked signal output power was higher than any other spurious response at least 40 dB. The locking range was 220MHz (second subharmonic locking), 100 MHz(4th subharmonic locking), and phase noise was -111 dBc/Hz, -104 dBc/Hz at 100kHz offset, respectively.

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A 2.4 ㎓ Back-gate Tuned VCO with Digital/Analog Tuning Inputs (디지털/아날로그 입력을 통해 백게이트 튜닝을 이용한 2.4 ㎓ 전압 제어 발진기의 설계)

  • Oh, Beom-Seok;Hwang, Young-Seung;Chae, Yong-Doo;Lee, Dae-Hee;Jung, Wung
    • Proceedings of the IEEK Conference
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    • 2003.11c
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    • pp.32-36
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    • 2003
  • In this work, we have designed a fully integrated 2.4GHz LC-tuned voltage-controlled oscillator (VCO) with multiple tuning inputs for a 0.25-$\mu\textrm{m}$ standard CMOS process. The design of voltage-controlled oscillator is based on an LC-resonator with a spiral inductor of octagonal type and pMOS-varactors. Only two metal layer have been used in the designed inductor. The frequency tuning is achieved by using parallel pMOS transistors as varactors and back-gate tuned pMOS transistors in an active region. Coarse tuning is achieved by using 3-bit pMOS-varactors and fine tuning is performed by using back-gate tuned pMOS transistors in the active region. When 3-bit digital and analog inputs are applied to the designed circuits, voltage-controlled oscillator shows the tuning feature of frequency range between 2.3 GHz and 2.64 GHz. At the power supply voltage of 2.5 V, phase noise is -128dBc/Hz at 3MHz offset from the carrier. Total power dissipation is 7.5 mW.

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Ka-Band MMIC VCO Design and its Fabrication (Ka-Band용 MMIC VCO의 설계 및 제작)

  • Kim, Wan-Sik;Kang, Seo;Kang, Dae-Hyun;Jeong, Seong-Il;Lee, Jae-Cheul;Lee, Jong-Arc
    • Journal of IKEEE
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    • v.7 no.2 s.13
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    • pp.230-235
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    • 2003
  • A small and integrated MMIC VCO(Voltage Controlled Oscillator) at Ka-band has been developed. This oscillator was designed as Clapp-Gouriet type scheme, fabricated, and implemented on the carrier. This was connected to an alumna substrate on the carrier providing output port for module, utilizing ribbon and wire bonding technique allowing the loss of 0.2dB. This VCO module showed the excellent performance.

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A Design of Push-push Voltage Controlled Oscillator using Frequency Tuning Circuit with Single Transmission Line (단일 전송선로의 주파수 동조회로를 이용한 push-push 전압제어 발진기의 설계 및 제작)

  • Ryu, Keun-Kwan;Kim, Sung-Chan
    • Journal of IKEEE
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    • v.16 no.2
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    • pp.121-126
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    • 2012
  • In this paper, a push-push VCDRO (Voltage Controlled Dielectric Resonator Oscillator) with a modified frequency tuning structure is investigated. The push-push VCDRO designed at 16GHz is manufactured using a LTCC (Low Temperature Co-fired Ceramic) technology to reduce the circuit size. The frequency tuning structure is embedded in intermediate layer of A6 substrate by an advantage of LTCC process. Experimental results show that the fundamental frequency suppression is above 30dBc, the frequency tuning range is 0.43MHz over control voltage of 0 to 12V, and phase noise of push-push VCDRO presents a good performance of -103dBc/Hz at 100KHz offset frequency from carrier.

A Semi-MMIC Hair-pin Resonator Oscillator for K-Band Application (K-Band용 SEmi-MMIC Hair-pin 공진발진기)

  • 이현태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.9B
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    • pp.1635-1640
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    • 2000
  • In this paper, a 18 GHz oscillator is designed with the push-push method an fabricated by semi-MMIC process, in which the second harmonic is the main output signal with the suppressed fundamental mode. In semi-MMIC process, passive components with microstrip transmission line are implemented using MMIC process on semi-insulating GaAs substrate. Then, chip types of P-HEMT, resistors, and capacitors are connected through Au wire-bonding. Also, the ground plane is inserted around the circuit and connected each other with the back-side of substrate through Au wire-bonding instead of via-hole. The semi-MMIC push-push oscillator shows the output powder of -10.5 dBm, the fundamental frequency suppression of -17.3 dBc/Hz, and the phase noise of -97.9 dBc/Hz at the offset frequency of 100 kHz.

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The Design of Dual Phase LNB for DBS Receiving (DBS 수신을 위한 Dual Phase LNB 설계)

  • Lim, Yun-Doo;Ko, Bong-Jin
    • Journal of Advanced Navigation Technology
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    • v.6 no.3
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    • pp.188-194
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    • 2002
  • DBS is utilized as very useful media in information-oriented society because it covers wide service area and provide high quality services. But DBS needs skill that can receive DBS signal at move. In this paper, it is considered a development of a device to receive DBS and design of a low noise downconverter that use tracking antenna to receive DBS at mobiles unit and ships which navigate in Korea peninsula coast. The structure of dual phase LNB is composed of LNA, BPF, oscillator, mixer, and IF amplifier. And for the position tracking, two input-output phase performed in phase. Measured results showed good performance that with respect to input signal 11.7 GHz~12.2 GHz, noise figure is 0.87 dBmax and conversion gain 62 dB, temperature characterization ${\pm}400$ kHz in respect to - 30 to $60^{\circ}C$, and phase noise -101 dBc/Hz in respect to offset 100 kHz.

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Performance Degradation due to Phase Jitter in IEEE 802.16 Downlink Signals

  • Kim, Youngsun;Kim, Seung-Geun;Kim, Kiseon
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1681-1684
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    • 2002
  • A multilevel modulation with selectable constellations is adopted in the downlink subframe modulation of the IEEE 802.16 standard to increase the total throughput. One of the decision factors of the modulation is the location of SS(Subscriber Station) . Also, for the 802.16, low phase noise of local oscillator is needed due to high operating frequency and severe loss in the propagation channel. We investigate the BER of down-link subframe with the phase jitter under the standard's specified LOS(line of sight) and multipath environment with randomly generated SS locations. Simulation results show BER performance degradation for the modulation corresponding to selected constellations and additionally required SNR to achieve 10$\^$-3/ BER under various phase jitter.

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