• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5A
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• pp.513-518
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• 2010

Improvement of phase noise characteristics in a different approach of HEMT VCO (Voltage Controlled Oscillator) with coupled microstrip lines to tune the oscillating frequency is investigated. Two HEMT VCOs of 9.8GHz are manufactured in the same configuration except for the frequency tuning circuit in order to empirically demonstrate the phase noise reduction. Experimental result shows that phase noise reduction can be enhanced 8dBc/Hz at 100KHz offset frequency from carrier by frequency tuning circuit with coupled microstrip lines over the conventional VCO.

• Journal of electromagnetic engineering and science
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• v.5 no.1
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• pp.8-13
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• 2005

The InGaP/GaAs hetero-junction bipolar transistor(HBT) monolithic voltage-controlled dielectric resonator oscillator(VCDRO) is first demonstrated for a Ku-band low noise block down-converter(LNB) system. The on-chip voltage control oscillator core employing base-collector(B-C) junction diodes is proposed for simpler frequency tuning and easy fabrication instead of the general off-chip varactor diodes. The fabricated VCDRO achieves a high output power of 6.45 to 5.31 dBm and a wide frequency tuning range of ]65 MHz( 1.53 $\%$) with a low phase noise of below -95dBc/Hz at 100 kHz offset and -115 dBc/Hz at ] MHz offset. A]so, the InGaP/GaAs HBT monolithic DRO with the same topology as the proposed VCDRO is fabricated to verify that the intrinsic low l/f noise of the HBT and the high Q of the DR contribute to the low phase noise performance. The fabricated DRO exhibits an output power of 1.33 dBm, and an extremely low phase noise of -109 dBc/Hz at 100 kHz and -131 dBc/Hz at ] MHz offset from the 10.75 GHz oscillation frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.2C
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• pp.191-200
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• 2002

A frequency synthesizer that can be used in IMT-2000 was designed and fabricated using dual loop PLL(Phase Locked Loop) in this paper. For improving phase noise characteristic two loops, reference loop and main loop, were divided. Phase noise was improved by transformed clamp type voltage controled oscillator and optimizing loop bandwidth in reference loop. And voltage controlled oscillator open loop gain in main loop. Fabricated the frequency synthesizer had 1.81GHz center frequency, 160MHz tuning range, 13.5dBm output power and -119.73dBc/Hz low phase noise characteristic.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.163-166
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• 1999

In this paper, frequency synthesizer that can be used in IMT-2000 was designed and fabricated using dual loop PLL(Phase Locked Loop). For improving phase noise characteristic Voltage Controlled Oscillator was fabricated using coaxial resonator and eliminated frequency divider using SPD as phase detector and increased open loop gain. Fabricated frequency synthesizer had 1.82㎓ center frequency, 160MHz tuning range and -119.73㏈c/Hz low phase noise characteristic.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.11
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• pp.2480-2486
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• 2012

The design of low voltage LC-VCO(LC Voltage Controlled Oscillator) has been presented to optimize the phase noise and power consumption for the block of frequency synthesis to satisfy WCDMA system specification in this paper. The parameters for minimum phase noise has been obtained in the region of design, using the lines of the tuning range and the excess gain in the plane of the inductance and the transconductance of MOS transistor to compensate the loss of LC-tank. As a result of simulation, the phase noise characteristics is -113dBc/Hz for offset of 1MHz. The optimum designed LC-VCO has been fabricated using the process of 0.25um CMOS. As a result of measurement for fabricated chip, the phase noise characteristics is -116dBc/Hz for offset of 1MHz. The power consumption is 15mW, and Kvco is 370MHz/V.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.12
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• pp.1-5
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• 2009

In this paper, low phase noise push-push oscillator (OSC) using the metamaterial resonator for missile defense systems and satellite communication was design and implemented. The metamaterial resonator has the large coupling coefficient value, which makes a high Q value, and has reduced phase noise of OSC. The OSC with 1.8 V power supply has phase noise of -117 dBc/Hz @100 kHz in the 12 GHz. When it has been compared with metamaterial resonator and coventional spiral resonator, the reduced Q value has been -29.7 dB and -47.6 dB respectively. This low phase noise OSC using metamaterial resonator could be available to a OSC in X-band.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.2
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• pp.67-71
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• 2012

In this paper, a push-push oscillator at K-band with a double H-shape metamaterial resonator (DHMR) based on high-Q is proposed with metamaterial structure to improve the phase noise and output power. The proposed oscillator shows low phase noise and high output power. DHMR is designed to be high-Q at resonance frequency through strong coupling of E-field. oscillators which are combined in push-push structure improve output power. The propose push-push oscillator shows the output power of 3.1 dBm, the fundamental signal suppression of -23.7 dBc and phase noise of -116.28 dBc at 100 kHz offset frequency and 20.20 GHz center frequency.

• Journal of electromagnetic engineering and science
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• v.6 no.2
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• pp.92-97
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• 2006

In this paper, a fully integrated Ku-band tripler differential MMIC voltage controlled oscillator(VCO), which consists of a differential VCO core and two triplers, is developed using high linearity InGaP/GaAs HBT technology. The VCO core generates an oscillation frequency of 3.583 GHz, an output power of 3.65 dBm, and a phase noise of -96.7 dBc/Hz at 100 kHz offset with a current consumption of 30 mA at a supply voltage of 2.9 V. The tripler shows excellent side band rejection of 23 dBc at 3 V and 12 mA. The tripler differential MMIC VCO produces an oscillation frequency of 10.75 GHz, an output power of -13 dBm and a phase noise of -89.35 dBc/Hz at 100 kHz offset.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.4
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• pp.468-474
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• 2012

A low phase-noise microwave oscillator is presented by a substrate integrated waveguide(SIW) loading a complementary split ring resonator(CSRR) in this paper. The unloaded $Q$-factor of the SIW cavity is increased by loading a complementary split ring resonator(CSRR) and its value exhibits 1960. It is theoretically and experimentally demonstrated that the proposed circuit generates 11.3 dBm of output power at 9.3 GHz and a phase-noise of -127.9 dBc/Hz at 1-MHz offset.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.1 no.1
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• pp.1-9
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• 2002

In this paper, a DRO (Dielectric Resonator Oscillator) with high stability in DSRC(Dedicated Short Range Communication) is designed and fabricated. The DRO shows the phase noise characteristic of -109.3 dBc/Hz at 100 kHz offset from the fundamental frequency. The output power of 11.53 dBm, and the second harmonic suppression of 55.33 dBc for the DRO are obtained. This DRO with high stability of the phase noise characteristic can be used for the system in DSRC.