• Journal of the Korean Ceramic Society
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• v.44 no.12
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• pp.710-714
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• 2007

LSGM$(La_{0.8}Sr_{0.2}Ga_{0.8}Mg_{0.2}O_{3-{\delta}})$ is the very promising electrolyte material for lower-temperature operation of SOFCs, especially when realized in anode-supported cells. But it is notorious for reacting with other cell components and resulting in the highly resistive reaction phases detrimental to cell performance. LDC$(La_{0.4}Ce_{0.6}O_{1.8})$, which is known to keep the interfacial stability between LSGM electrolyte and anode, was adopted in the anode-supported cell, and its effect on the interfacial reactivity and electrochemical performance of the cell was investigated. No severe interfacial reaction and corresponding resistive secondary phase was found in the cell with LDC buffer layer, and this is due to its ability to sustain the La chemical potential in LSGM. The cell exhibited the open circuit voltage of 0.64V, the maximum power density of 223 $mW/cm^2$, and the ohmic resistance of $0.17{\Omega}cm^2$ at $700^{\circ}C$. These values were much improved compared with those from the cell without any buffer layer, which implies that formation of the resistive reaction phases in LSGM and then deterioration of the cell performance is resulted mainly from the La diffusion from LSGM electrolyte to anode.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.88-93
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• 1994

We fabricated a large-scale photovoltaic device for detecting-3-5$\mu$m IR, by forming of n$^{+}$-p junction in the $Hg_{1-x}Cd_{x}$Te (MCT) layer which was grown by LPE on CdTe substrate. The composition x of the MCT epitaxial layer was 0.295 and the hole concentration was 1.3${\times}10^{13}/cm^{4}$. The n$^{+}$-p junction was formed by B+ implantation at 100 keV with a does 3${\times}10^{11}/cm^{2}. The n$^{+}$ region has a circular shape with 2.68mm diameter. The vacuum-evaporated ZnS with resistivity of 2${\times}10^{4}{\Omega}$cm is used as an insulating layer over the epitaxial layer. ZnS plays the role of the anti-reflection coating transmitting more than 90% of 3~5$\mu$m IR. For ohmic contacts, gole was used for p-MCT and indium was used for n$^{+}$-MCT. The fabrication took 5 photolithographic masks and all the processing temperatures of the MCT wafer were below 90$^{\circ}C$. The R,A of the fabricated devices was 7500${\Omega}cm^{2}$. The carrier lifetime of the devices was estimated 2.5ns. The junction was linearly-graded and the concentration slope was measured to be 1.7${\times}10^{17}/{\mu}m$. the normalized detectivity in 3~5$\mu$m IR was 1${\times}10^{11}cmHz^{12}$/W, which is sufficient for real application.

• Korean Journal of Materials Research
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• v.23 no.3
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• pp.194-198
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• 2013

In this paper, we studied a p-type reflector based on indium tin oxide (ITO) for vertical-type ultraviolet light-emitting diodes (UV LEDs). We investigated the reflectance properties with different deposition methods. An ITO layer with a thickness of 50 nm was deposited by two different methods, sputtering and e-beam evaporation. From the measurement of the optical reflection, we obtained 70% reflectance at a wavelength of 382 nm by means of sputtering, while only 30% reflectance resulted when using the e-beam evaporation method. Also, the light output power of a $1mm{\times}1mm$ vertical chip created with the sputtering method recorded a twofold increase over a chip created with e-beam evaporation method. From the measurement of the root mean square (RMS), we obtained a RMS value 1.3 nm for the ITO layer using the sputtering method, while this value was 5.6 nm for the ITO layer when using the e-beam evaporation method. These decreases in the reflectance and light output power when using the e-beam evaporation method are thought to stem from the rough surface morphology of the ITO layer, which leads to diffused reflection and the absorption of light. However, the turn-on voltage and operation voltage of the two samples showed identical results of 2.42 V and 3.5 V, respectively. Given these results, we conclude that the two ITO layers created by different deposition methods showed no differences in the electric properties of the ohmic contact and series resistance.

• Korean Journal of Metals and Materials
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• v.48 no.5
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• pp.456-461
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• 2010

We investigated the In-based ohmic contacts on Nitrogen-face (N-face) n-type GaN, as well as Ga-face n-type GaN, for InGaN-based vertical Light Emitting Diodes (LEDs). For this purpose, we fabricated Circular Transfer Length Method (CTLM) patterns on the N-face n-GaN that were prepared by using a laser-lift off method, as well as on the Ga-face n-GaN that were prepared by using a dry etching method. Then, In/transparent conducting oxide (TCO) and In/TiW schemes were deposited on the CTLM in order for low resistance ohmic contacts to form. The In/TCO scheme on the Ga-face n-GaN showed high specific contact resistance, while the minimum specific contact resistance was only 3${\times}$10$^{-2}$ $\Omega$-cm$^{2}$ after annealing at 300${^{\circ}C}$, which can be attributed to the high sheet resistance of the TCO layer. In contrast, the In/TiW scheme on the Ga-face n-GaN produced low specific contact resistance of 2.1${\times}$10$^{5}$ $\Omega$-cm$^{2}$ after annealing at 500${^{\circ}C}$ for 1 min. In addition, the In/TiW scheme on the N-face n-GaN also resulted in a low specific contact resistance of 2.2${\times}$10$^{-4}$ $\Omega$-cm$^{2}$ after annealing at 300${^{\circ}C}$. These results suggest that both the Ga-face n-GaN and N-face n-GaN.

• Proceedings of the Korean Magnestics Society Conference
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• 2010.06a
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• pp.79-79
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• 2010

Semimetallic bismuth (Bi) has been extensively investigated over the last decade since it exhibits very intriguing transport properties due to their highly anisotropic Fermi surface, low carrier concentration, long carrier mean free path l, and small effective carrier mass $m^*$. In particular, the great interest in Bi nanowires lies in the development of nanowire fabrication methods and the opportunity for exploring novel low-dimensional phenomena as well as practical application such as thermoelectricity[1]. In this work, we introduce a self-assembled interconnection of nanostructures produced by an on-film formation of nanowires (OFF-ON) method in order to form a highly ohmic Bi nanobridge. A Bi thin film was first deposited on a thermally oxidized Si (100) substrate at a rate of $40\;{\AA}/s$ by radio frequency (RF) sputtering at 300 K. The sputter system was kept in an ultra high vacuum (UHV) of $10^{-6}$ Torr before deposition, and sputtering was performed under an Ar gas pressure of 2m Torr for 180s. For the lateral growth of Bi nanowires, we sputtered a thin Cr (or $SiO_2$) layer on top of the Bi film. The Bi thin films were subsequently put into a custom-made vacuum furnace for thermal annealing to grow Bi nanowires by the OFF-ON method. After thermal annealing, the Bi nanowires cannot be pushed out from the topside of the Bi films due to the Cr (or $SiO_2$) layer. Instead, Bi nanowires grow laterally as a mean s of releasing the compressive stress. We fabricated a self-assembled Bi nanobridge (d=192 nm) device in-situ using OFF-ON through annealing at $250^{\circ}C$ for 10hours. From I-V measurements taken on the Bi nanobridge device, contacts to the nanobridge were found highly ohmic. The quality of the Bi nanobridge was also proved by the high MR of 123% obtained from transverse MR measurements. These results manifest the possibility of self-assembled nanowire interconnection between various nanostructures for a variety of applications and provide a simple device fabrication method to investigate transport properties on nanowires without complex patterning and etching processes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.2
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• pp.14-19
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• 2011

We have fabricated GaN Schottky barrier diode (SBD) for high-voltage applications on Si substrate. The leakage current and the electrical characteristics of GaN SBD are investigated by annealing metal-semiconductor junctions. Ohmic junctions of Ti/Al/Mo/Au and Schottky junctions of Ni/Au are used in the fabrication. A test structure is proposed to measured buffer leakage current through a mesa structure. When annealing temperature is increased from $700^{\circ}C$ to $800^{\circ}C$, measured buffer leakage current is also increased from 87 nA to 780 nA at the width of 100 ${\mu}m$. The diffusion of Au, Ti, Mo, O into GaN buffer layer increases the leakage current and that is verified by Auger electron spectroscopy. Experimental results show that the low leakage current and the high breakdown voltage of GaN SBD are achieved by annealing metal-semiconductor junctions.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.426.2-426.2
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• 2016

Numerous of researches are being conducted to improve the efficiency of $Cu_2ZnSnSe_4$ (CZTSe)-based photovoltaic devices, which is one of the most promising candidates for low cost and environment-friendly solar cells. In this work, we concentrate on the back contact of the devices. A proper thickness of $MoSe_2$ in back contact structure is believed to enhance adhesion and ohmic contact between Mo back contact and absorber layer. Nevertheless, too thick $MoSe_2$ layers that are grown during high-temperature selenization process can impede the current collection, thus resulting in low cell performance. By applying molybdenum nitride as a barrier in back contact structure, we were able to control the thickness of $MoSe_2$ layer, which resulted in lower series resistance and higher fill factor of CZTSe devices. The phase transformation of Mo-N binary system was systematically studied by changing $N_2$ concentration during the sputtering process. With a proper phase of Mo-N fabricated by using an adequate partial pressure of $N_2$, the efficiency of CZTSe solar cells as high as 8.31% was achieved while the average efficiency was improved by about 2% with respect to that of the referent cells where no barrier layer was employed.

• Journal of Information Display
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• v.10 no.3
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• pp.111-116
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• 2009

In this paper, a plasma-assisted patterning method for the organic layers of organic light-emitting diodes (OLEDs) and its effect on the OLED performances are reported. Oxygen plasma was used to etch the organic layers, using the top electrode consisting of lithium fluoride and aluminum as an etching mask. Although the current flow at low voltages increased for the etched OLEDs, there was no significant degradation of the OLED efficiency and lifetime in comparison with the conventional OLEDs. Therefore, this method can be used to reduce the ohmic voltage drop along the common top electrodes by connecting the top electrode with highly conductive bus lines after the common organic layers on the bus lines are etched by plasma. To further analyze the current increase at low voltages, the plasma patterning effect on the OLED performance was investigated by changing the device sizes, especially in one direction, and by changing the etching depth in the vertical direction of the device. It was found that the current flow increase at low voltages was not proportional to the device sizes, indicating that the current flow increase does not come from the leakage current along the etched sides. In the etching depth experiment, the current flow at low voltages did not increase when the etching process was stopped in the middle of the hole transport layer. This means that the current flow increase at low voltages is closely related to the modification of the hole injection layer, and thus, to the modification of the interface between the hole injection layer and the bottom electrode.

• Applied Science and Convergence Technology
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• v.26 no.5
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• pp.110-113
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• 2017

The two-dimensional layered $MoS_2$ has high mobility and excellent optical properties, and there has been much research on the methods for using this for next generation electronics. $MoS_2$ is similar to graphene in that there is comparatively weak bonding through Van der Waals covalent bonding in the substrate-$MoS_2$ and $MoS_2-MoS_2$ heteromaterial as well in the layer-by-layer structure. So, on the monatomic level, $MoS_2$ can easily be exfoliated physically or chemically. During the $MoS_2$ field-effect transistor fabrication process of photolithography, when using water, the water infiltrates into the substrate-$MoS_2$ gap, and leads to the problem of a rapid decline in the material's yield. To solve this problem, an epoxy-based, as opposed to a water-based photoresist, was used in the photolithography process. In this research, a hydrophobic $MoS_2$ field effect transistor (FET) was fabricated on a hydrophilic $SiO_2$ substrate via chemical vapor deposition CVD. To solve the problem of $MoS_2$ exfoliation that occurs in water-based photolithography, a PPMA sacrificial layer and SU-8 2002 were used, and a $MoS_2$ film FET was successfully created. To minimize Ohmic contact resistance, rapid thermal annealing was used, and then electronic properties were measured.

• Journal of Hydrogen and New Energy
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• v.17 no.2
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• pp.204-211
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• 2006

The electrolyte in the solid oxide fuel cell must be dense enough to avoid gas leakage and thin enough to reduce the ohmic resistance. In order to manufacture the thin and dense electrolyte layer, 8 mol% $Y_2O_3$ stabilized-$ZrO_2$ (8YSZ) electrolyte layers were coated on the porous tubular substrate by the novel vacuum slurry dip-coating process. The effects of the slurry concentration, presintering temperature, and vacuum pressure on the thickness and the gas permeability of the coated electrolyte layers have been examined in the vacuum slurry coating process. The vacuum-coated electrolyte layers showed very low gas permeabilities and had thin thicknesses. The single cell with the vacuum-coated electrolyte layer indicated a good performance of $495\;mW/cm^2$, 0.7 V at $700^{\circ}C$. The experimental results show that the vacuum dip-coating process is an effective method to fabricate dense thin film on the porous tubular substrate.