• Korean Journal of Materials Research
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• v.5 no.6
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• pp.699-705
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• 1995

Effect of the grain boundary phases in Si$_3$N$_4$ ceramics on the fracture tonghness has been investigated. The Si$_3$N$_4$-Y$_2$O$_3$-SiO$_2$, (YS) and Si$_3$N$_4$-Y$_2$O$_3$-Al$_2$O$_3$(YA) systems were Can/HIP treated at 1750$^{\circ}C$ and then heat-treated at 1800∼2000$^{\circ}C$. The fracture toughness of the YA system, the grain boundary phase was only glass phase after heat-treatement, was increased. That of the YS system, however, the grain boundary phase was changed from crystalline and glass to glass phase after the heat -treatement above 1900$^{\circ}C$, was abruptly decreased. The reason of the sudden drop of the fracture toughness of the YS system was believed that the change of the grain boundary phases from crystalline and glass to glass phase effected un the fracture behavior.

• Journal of the Korean Ceramic Society
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• v.37 no.1
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• pp.21-25
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• 2000

Gas pressure sintered silicon nitride based composites with 5 wt% $\beta$-Si3N4 whiskers were prepared, and the variations depending on sintering additives and sintering temperature were studied. Sintering additives were 6 wt% Y2O3-1 wt% MgO(6Y1M), 6 wt%Y2O3-1 wt% Al2O3(6Y1A), 6 wt% Y2O3-1 wt% SiO2(6Y1S), and whiskers were unidirectionally oriented by a modified tape casting technique. Samples were fully densified by gas pressure sintering at 2148 K and 2273 K. As the sintering temperature increased, the size of large elongated grains was increased. Three point flexural strength of 6Y1M and 6Y1M samples was higher than that of 6Y1S sample, and the strength decreased as the sintering temperature increased. The indentation crack length became shorter for the sample sintered at higher temperature, and the difference between the cracks length parallel to and normal to the direction of whisker alignment was decreased. In case of cracks 45$^{\circ}$off the whisker alignment direction, the crack length anisotropy disappeared.

• Journal of the Korean Ceramic Society
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• v.48 no.5
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• pp.368-372
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• 2011

Aluminum nitride (AlN) has excellent thermal conductivity, whereas it has some disadvantage such as low sinterability. In this study, the effects of sintering additive content and sintering condition on thermal conductivity of pressureless sintered AlN ceramics were examined on the variables of 1~3 wt% sintering additive ($Y_2O_3$) content at $1900^{\circ}C$ in $N_2$ atmosphere with holding time of 2~10 h. All AlN specimens showed higher thermal conductivity as the $Y_2O_3$ content and holding time increase. The formation of secondary phases (yttrium aluminates) by reaction of $Y_2O_3$ and $Al_2O_3$ from AlN surface promoted the thermal conductivity of AlN specimens, because the secondary phases could reduce the oxygen contents in AlN lattice. Also, thermal conductivity was increased by long sintering time because of the uniform distribution and the elimination of the secondary phases at the grain boundary by the evaporation effect during long holding time. A carbothermal reduction reaction was also affected on the thermal conductivity. The thermal conductivity of AlN specimens sintered at $1900^{\circ}C$ for 10 h showed 130~200W/mK according to the content of sintering additive.

• Journal of the Korean Ceramic Society
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• v.49 no.6
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• pp.631-636
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• 2012

Conventional SONOS (poly-silicon/oxide/nitride/oxide/silicon) type memory is associated with a retention issue due to the continuous demand for scaled-down devices. In this study, $Al_2O_3/Y_2O_3/SiO_2$ (AYO) multilayer structures using a high-k $Y_2O_3$ film as a charge-trapping layer were fabricated for nonvolatile memory applications. This work focused on improving the retention properties using a $Y_2O_3$ layer with different tunnel oxide thickness ranging from 3 nm to 5 nm created by metal organic chemical vapor deposition (MOCVD). The electrical properties and reliabilities of each specimen were evaluated. The results showed that the $Y_2O_3$ with 4 nm $SiO_2$ tunnel oxide layer had the largest memory window of 1.29 V. In addition, all specimens exhibited stable endurance characteristics (program/erasecycles up to $10^4$) due to the superior charge-trapping characteristics of $Y_2O_3$. We expect that these high-k $Y_2O_3$ films can be candidates to replace $Si_3N_4$ films as the charge-trapping layer in SONOS-type flash memory devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.05a
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• pp.91-96
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• 1992

The nonvolatile SNOSFET EEPROM memory devices with the channel width and iength of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$], 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$] and 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$] were fabricated by using the actual CMOS 1 [Mbit] process technology. The charateristics of I$\_$D/-V$\_$D/, I$\_$D/-V$\_$G/ were investigated and compared with the channel width and length. From the result of measuring the I$\_$D/-V$\_$D/ charges into the nitride layer by applying the gate voltage, these devices ere found to have a low conductance state with little drain current and a high conductance state with much drain current. It was shown that the devices of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$] represented the long channel characteristics and the devices of 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$] and 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$] represented the short channel characteristics. In the characteristics of I$\_$D/-V$\_$D/, the critical threshold voltages of the devices were V$\_$w/ = +34[V] at t$\_$w/ = 50[sec] in the low conductance state, and the memory window sizes wee 6.3[V], 7.4[V] and 3.4[V] at the channel width and length of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$], 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$], 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$], respectively. The positive logic conductive characteristics are suitable to the logic circuit designing.

• Journal of Sensor Science and Technology
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• v.15 no.4
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• pp.237-244
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• 2006

Atomic force microscope (AFM) has become a common tool for the structural and physical studies of biological macromolecules, mainly because it provides the ability to perform experiments with samples in a buffer solution. In this study, structure of proteins and nucleic acids has been studied in their physiological environment that allows native intermolecular complexes to be formed. Cr and Au were deposited on p-Si (100) substrate by thermal evaporation method in sequence with the thickness of $200{\AA}$ and $500{\AA}$, respectively, since Au is adequate for immobilizing biomolecules by forming a self-assembled monolayer (SAM) with semiconductor-based biosensors. The SAM, streptavidin and biotin interacted each other with their specific binding energy and their adsorption was analyzed using the Bio-AFM both in a solution and under air environment. A silicon nitride tip was used as a contact tip of Bio-AFM measurement in a solution and an antimony doped silicon tip as a tapping tip under air environment. Actual morphology could also be obtained by 3-dimensional AFM images. The length and agglomerate size of biomolecules was measured in stages. Furthermore, $R_{a}$ (average of surface roughness) and $R_{ms}$ (mean square of surface roughness) and surface density for the adsorbed surface were also calculated from the AFM image.

• Journal of Sensor Science and Technology
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• v.2 no.1
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• pp.95-99
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• 1993

a-Si : H TFTs for image sensor have been fabricated and their operational characteristics have been investigated. Hydrogenated amorphous silicon nitride(a-SiN : H) films were used for the gate insulator and $n^{+}$-a-Si : H films were depostied for the source and drain contact. The thicknesses of a-SiN : H and a-Si : H films were $2000{\AA}$, respectively and the thickness of $n^{+}$-a-Si : H film was $500{\AA}$. Also the channel length and channel width of a-Si : H TFTs were $50{\mu}m$ and $1000{\mu}m$, respectively. The ON/OFF current ratio, threshold voltage, and field effect mobility of fabricated a-Si : H TFTs were $10^{5}$, 6.3 V, and $0.15cm^{2}/V{\cdot}s$, respectively.

• Transactions of the Society of Information Storage Systems
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• v.2 no.2
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• pp.96-99
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• 2006

In this research, a wafer-level transfer method of cantilever away on a conventional CMOS circuit has been developed for high density probe-based data storage. The transferred cantilevers were silicon nitride ($Si_3N_4$) cantilevers integrated with poly silicon heaters and piezoelectric sensors, called thermo-piezoelectric $Si_3N_4$ cantilevers. In this process, we did not use a SOI wafer but a conventional p-type wafer for the fabrication of the thermo-piezoelectric $Si_3N_4$ cantilever arrays. Furthermore, we have developed a very simple transfer process, requiring only one step of cantilever transfer process for the integration of the CMOS wafer and cantilevers. Using this process, we have fabricated a single thermo-piezoelectric $Si_3N_4$ cantilever, and recorded 65nm data bits on a PMMA film and confirmed a charge signal at 5nm of cantilever deflection. And we have successfully applied this method to transfer 34 by 34 thermo-piezoelectric $Si_3N_4$ cantilever arrays on a CMOS wafer. We obtained reading signals from one of the cantilevers.

• Journal of the Korea Institute of Military Science and Technology
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• v.15 no.6
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• pp.812-819
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• 2012

Interference and jamming are becoming increasing concern to a radar system nowdays. AESA(Active Electronically Steered Array) antennas and adaptive beamforming(ABF), in which antenna beam patterns can be modified to reject the interference, offer a potential solution to overcome the problems encountered. In this paper, we've developed a planar active phased array radar system, in which ABF, target detection and tracking algorithm operate in real-time. For the high output power and the low noise figure of the antenna, we've designed the S-band TRMs based on GaN HEMT. For real-time processing, we've used wavelenth division multiplexing technique on fiber optic communication which enables rapid data communication between the antenna and the signal processor. Also, we've implemented the HW and SW architecture of Real-time Signal Processor(RSP) for adaptive beamforming that uses SMI(Sample Matrix Inversion) technique based on MVDR(Minimum Variance Distortionless Response). The performance of this radar system has been verified by near-field and far-field tests.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1268-1270
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• 1993

In this study, the characteristics of Si-$SiO_2$ interface and its degradation in short channel SONOSFET nonvolatile memory devices, fabricated by 1Mbit CMOS process($1.2{\mu}m$ design rule), with $65{\AA}$ blocking oxide layer, $205{\AA}$ nitride layer, and $30{\AA}$ tunneling oxide layer on the silicon wafer were investigated using the charge pumping method. For investigating the Si-$SiO_2$ interface characteristics before and after write/erase cycling, charge pumping current characteristics with frequencies, write/erase cycles, as a parameters, were measured. As a result, average Si-$SiO_2$ interface trap density and mean value of capture cross section were determined to be $1.203{\times}10^{11}cm^{-2}eV^{-1}\;and\;2.091{\times}10^{16}cm^2$ before write/erase cycling, respectively. After cycling, when the write/erase cycles are $10^4$, average $Si-SiO_2$ interface trap density was $1.901{\times}10^{11}cm^{-2}eV^{-1}$. Incresing write/erase cycles beyond about $10^4$, Si-$SiO_2$ interface characteristics with write/erase cycles was increased logarithmically.