• Title/Summary/Keyword: nano $SiO_2$

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Preparation Nanosized TPA-Silicalite-1 with Different Silica Sources and Promoters (다양한 실리카 원과 결정화 촉진제를 이용한 나노크기의 TPA-Silicalite-1 제조)

  • Jung, Sang-Jin
    • Applied Chemistry for Engineering
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    • v.25 no.3
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    • pp.286-291
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    • 2014
  • In this study, nanosized TPA-silicalite-1 was synthesized with a suitable molar composition of TPAOH: $SiO_2$: $H_2O$ for the development of zeolite ceramic membranes to utilize as gas separation. As silica sources, TEOS, LUDOX AS-40 and CAB-O-SIL were used with the starting material of TPAOH. $NaH_2PO_4$, and a variety of acids and bases were used as promoters after TPAOH, $SiO_2$, $H_2O$ gel synthesis. To decrease synthesis time, a two step temperature change method was applied to the synthesis of TPA-silicalite-1 at a low temperature. TPA-silicalite-1 synthesized was analyzed with XRD, SEM, BET and TGA. As a result, TPA-silicalite-1 powders with a particle size of 100 nm and a specific surface area of $416m^2/g$ were obtained as optimum synthesis conditions when the two stage temperature change method was used with $NaH_2PO_4$ as promoter.

Highly Doped Nano-crystal Embedded Polymorphous Silicon Thin Film Deposited by Using Neutral Beam Assisted CVD at Room Temperature

  • Jang, Jin-Nyeong;Lee, Dong-Hyeok;So, Hyeon-Uk;Hong, Mun-Pyo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.154-155
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    • 2012
  • The promise of nano-crystalites (nc) as a technological material, for applications including display backplane, and solar cells, may ultimately depend on tailoring their behavior through doping and crystallinity. Impurities can strongly modify electronic and optical properties of bulk and nc semiconductors. Highly doped dopant also effect structural properties (both grain size, crystal fraction) of nc-Si thin film. As discussed in several literatures, P atoms or radicals have the tendency to reside on the surface of nc. The P-radical segregation on the nano-grain surfaces that called self-purification may reduce the possibility of new nucleation because of the five-coordination of P. In addition, the P doping levels of ${\sim}2{\times}10^{21}\;at/cm^3$ is the solubility limitation of P in Si; the solubility of nc thin film should be smaller. Therefore, the non-activated P tends to segregate on the grain boundaries and the surface of nc. These mechanisms could prevent new nucleation on the existing grain surface. Therefore, most researches shown that highly doped nc-thin film by using conventional PECVD deposition system tended to have low crystallinity, where the formation energy of nucleation should be higher than the nc surface in the intrinsic materials. If the deposition technology that can make highly doped and simultaneously highly crystallized nc at low temperature, it can lead processes of next generation flexible devices. Recently, we are developing a novel CVD technology with a neutral particle beam (NPB) source, named as neutral beam assisted CVD (NBaCVD), which controls the energy of incident neutral particles in the range of 1~300eV in order to enhance the atomic activation and crystalline of thin films at low temperatures. During the formation of the nc-/pm-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. In the case of phosphorous doped Si thin films, the doping efficiency also increased as increasing the reflector bias (i.e. increasing NPB energy). At 330V of reflector bias, activation energy of the doped nc-Si thin film reduced as low as 0.001 eV. This means dopants are fully occupied as substitutional site, even though the Si thin film has nano-sized grain structure. And activated dopant concentration is recorded as high as up to 1020 #/$cm^3$ at very low process temperature (< $80^{\circ}C$) process without any post annealing. Theoretical solubility for the higher dopant concentration in Si thin film for order of 1020 #/$cm^3$ can be done only high temperature process or post annealing over $650^{\circ}C$. In general, as decreasing the grain size, the dopant binding energy increases as ratio of 1 of diameter of grain and the dopant hardly be activated. The highly doped nc-Si thin film by low-temperature NBaCVD process had smaller average grain size under 10 nm (measured by GIWAXS, GISAXS and TEM analysis), but achieved very higher activation of phosphorous dopant; NB energy sufficiently transports its energy to doping and crystallization even though without supplying additional thermal energy. TEM image shows that incubation layer does not formed between nc-Si film and SiO2 under later and highly crystallized nc-Si film is constructed with uniformly distributed nano-grains in polymorphous tissues. The nucleation should be start at the first layer on the SiO2 later, but it hardly growth to be cone-shaped micro-size grains. The nc-grain evenly embedded pm-Si thin film can be formatted by competition of the nucleation and the crystal growing, which depend on the NPB energies. In the evaluation of the light soaking degradation of photoconductivity, while conventional intrinsic and n-type doped a-Si thin films appeared typical degradation of photoconductivity, all of the nc-Si thin films processed by the NBaCVD show only a few % of degradation of it. From FTIR and RAMAN spectra, the energetic hydrogen NB atoms passivate nano-grain boundaries during the NBaCVD process because of the high diffusivity and chemical potential of hydrogen atoms.

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Inductively coupled plasma etching of SnO2 as a new absorber material for EUVL binary mask

  • Lee, Su-Jin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.124-124
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    • 2010
  • Currently, extreme ultraviolet lithography (EUVL) is being investigated for next generation lithography. EUVL is one of competitive lithographic technologies for sub-22nm fabrication of nano-scale Si devices that can possibly replace the conventional photolithography used to make today's microcircuits. Among the core EUVL technologies, mask fabrication is of considerable importance due to the use of new reflective optics having a completely different configuration compared to those of conventional photolithography. Therefore, new materials and new mask fabrication process are required for high performance EUVL mask fabrication. This study investigated the etching properties of SnO2 (Tin Oxide) as a new absorber material for EUVL binary mask. The EUVL mask structure used for etching is SnO2 (absorber layer) / Ru (capping / etch stop layer) / Mo-Si multilayer (reflective layer) / Si (substrate). Since the Ru etch stop layer should not be etched, infinitely high selectivity of SnO2 layer to Ru ESL is required. To obtain infinitely high etch selectivity and very low LER (line edge roughness) values, etch parameters of gas flow ratio, top electrode power, dc self - bias voltage (Vdc), and etch time were varied in inductively coupled Cl2/Ar plasmas. For certain process window, infinitely high etch selectivity of SnO2 to Ru ESL could be obtained by optimizing the process parameters. Etch characteristics were measured by on scanning electron microscopy (SEM) and X-ray photoelectron spectroscopy (XPS) analyses. Detailed mechanisms for ultra-high etch selectivity will be discussed.

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광전자 소자 응용을 위한 수직 정렬된 ZnO Nanorod Array를 이용한 계층 나노구조

  • Go, Yeong-Hwan;Yu, Jae-Su
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.126-126
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    • 2011
  • 수직으로 정렬된 1차원 ZnO nanorod arrays (NRAs)는 효율적인 반사방지 특성의 기하학적 구조를 갖고 있어, 크기와 모양 그리고 정렬형태의 다양한 설계를 통해 빛의 흡수율과 광 추출효율을 증가시켜 광전소자 및 태양광 소자의 성능을 향상시킬 수 있으며, 최근 이러한 연구에 대한 관심이 집중되고 있다. 본 연구에서는 ZnO NRAs의 넓은 표면적과 불연속적인 독특한 표면을 활용하여 광학적 특성을 효과적으로 개선하였다. 실험을 위해, thermal evaporator를 사용하여 Au와 Ag 그리고 e-beam evaporator를 사용하여 $SiO_2$를 ZnO NRAs 표면에 여러 가지 조건으로 증착하여, 독특한 계층 나노구조의 형성과 광학적 특성을 관찰하였다. 표면 roughness가 큰 FTO/glass 위에 수열합성법을 통해 끝이 뾰족하고, 비스듬히 정렬된 ZnO nano-tip array에 Au를 증착할 경우 ZnO/Au core/shell 구조가 형성되며, Au의 광 흡수율이 매우 크게 증가함을 관찰할 수 있었다. 반면 flat한 표면위에 빽빽하게 수직으로 정렬된 ZnO NRAs를 성장시켜 그 위에 Ag를 증착할 경우, evaporated Ag flux가 ZnO nanorod의 사이에 scattered 되어 ZnO nanorod 기둥의 측면에 직경이 50 nm 이하인 nanoparticles이 decorated 되어 국소표면플라즈몬 현상이 관찰되었으며, 이러한 효과를 통해 입사되는 빛의 흡수율을 효과적으로 증가시킬 수 있었다. 또한, ZnO NRAs의 표면에 $SiO_2$를 e-beam evaporator를 이용하여 증착할 경우, 자연적으로 vapor flux와 ZnO nanorod 사이에 oblique angle이 $80^{\circ}$ 이상으로 증가하여 $SiO_2$ nanorods가 자발적으로 형성되어 ZnO/$SiO_2$ branch 계층형태의 나노구조를 제작할 수 있었다. 이러한 구조는 유효 graded refractive index profile로 인해 기존의 ZnO NRAs보다 개선된 반사방지 특성을 나타냈다. 이러한 계층 나노구조의 광학적 특성을 시뮬레이션을 통해 이론적으로 분석을 통해 광전자 소자의 성능의 개선에 대한 적용 가능성을 조사하였다.

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Fabrication and characterization of $WSi_2$ nanocrystals memory device with $SiO_2$ / $HfO_2$ / $Al_2O_3$ tunnel layer

  • Lee, Hyo-Jun;Lee, Dong-Uk;Kim, Eun-Kyu;Son, Jung-Woo;Cho, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.134-134
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    • 2011
  • High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

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Resistance Switching Mechanism of Metal-Oxide Nano-Particles Memory on Graphene Layer

  • Lee, Dong-Uk;Kim, Dong-Wook;Kim, Eun-Kyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.318-318
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    • 2012
  • A graphene layer is most important materials in resent year to enhance the electrical properties of semiconductor device due to high mobility, flexibility, strong mechanical resistance and transparency[1,2]. The resistance switching memory with the graphene layer have been reported for next generation nonvolatile memory device[3,4]. Also, the graphene layer is able to improve the electrical properties of memory device because of the high mobility and current density. In this study, the resistance switching memory device with metal-oxide nano-particles embedded in polyimide layer on the graphene mono-layer were fabricated. At first, the graphene layer was deposited $SiO_2$/Si substrate by using chemical vapor deposition. Then, a biphenyl-tetracarboxylic dianhydride-phenylene diamine poly-amic-acid was spin coated on the deposited metal layer on the graphene mono-layer. Then the samples were cured at $400^{\circ}C$ for 1 hour in $N_2$ atmosphere after drying at $135^{\circ}C$ for 30 min through rapid thermal annealing. The deposition of aluminum layer with thickness of 200 nm was done by a thermal evaporator. The electrical properties of device were measured at room temperature using an HP4156a precision semiconductor parameter analyzer and an Agilent 81101A pulse generator. We will discuss the switching mechanism of memory device with metal-oxide nano-particles on the graphene mono-layer.

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Nano-floating gate memory using size-controlled Si nanocrystal embedded silicon nitride trap layer

  • Park, Gun-Ho;Heo, Cheol;Seong, Geon-Yong;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.148-148
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    • 2010
  • 플래시 메모리로 대표되는 비휘발성 메모리는 IT 기술의 발달에 힘입어 급격한 성장세를 나타내고 있지만, 메모리 소자의 크기가 작아짐에 따라서 그 물리적 한계에 이르러 차세대 메모리에 대한 요구가 점차 높아지고 있는 실정이다. 따라서, 이러한 문제점에 대한 대안으로서 고속 동작 및 정보의 저장 시간을 향상 시킬 수 있는 nano-floating gate memory (NFGM)가 제안되었다. Nano-floating gate에서 사용되는 nanocrystal (NCs) 중에서 Si nanocrystal은 비휘발성 메모리뿐만 아니라 발광 소자 및 태양 전지 등의 매우 다양한 분야에 광범위하게 응용되고 있지만, NCs의 크기와 밀도를 제어하는 것이 가장 중요한 문제로 이를 해결하기 위해서 많은 연구가 진행되고 있다. 또한, 소자의 소형화가 이루어지면서 기존의 플래시 메모리 한계를 극복하기 위해서 터널베리어에 관한 관심이 크게 증가했다. 특히, 최근에 많은 주목을 받고 있는 개량형 터널베리어는 크게 VARIOT (VARIable Oxide Thickness) barrier와 CRESTED barrier의 두 가지 종류가 제안되어 있다. VARIOT의 경우에는 매우 얇은 두께의low-k/high-k/low-k 의 적층구조를 가지며, CRESTED barrier의 경우에는 반대의 적층구조를 가진다. 이와 같은 개량형 터널 베리어는 전계에 대한 터널링 전류의 감도를 증가시켜서 쓰기/지우기 특성을 향상시키며, 물리적인 절연막 두께의 증가로 인해 데이터 보존 시간의 향상을 달성할 수 있다. 본 연구에서는 박막의 $SiO_2$$Si_3N_4$를 적층한 VARIOT 타입의 개량형 터널 절연막 위에 전하 축적층으로 $SiN_x$층의 내부에 Si-NCs를 갖는 비휘발성 메모리 소자를 제작하였다. Si-NCs를 갖지 않는 $SiN_x$전하 축적층은 Si-NCs를 갖는 전하 축적층보다 더 작은 메모리 윈도우와 열화된 데이터 보존 특성을 나타내었다. 또한, Si-NCs의 크기가 감소됨에 따라 양자 구속 효과가 증가되어 느린 지우기 속도를 보였으나, 데이터 보존 특성이 크게 향상됨을 알 수 있었다. 그러므로, NFGM의 빠른 쓰기/지우기 속도와 데이터 보존 특성을 동시에 만족하기 위해서는 Si-NCs의 크기 조절이 매우 중요하며, NCs크기의 최적화를 통하여 고집적/고성능의 차세대 비휘발성 메모리에 적용될 수 있을 것이라 판단된다.

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Preparation and Electrical Properties of TiO2 Films Prepared by Sputtering for a Pulse Power Capacitor (스퍼터링에 의한 펄스파워 캐패시터용 TiO2 박막의 제조 및 전기적특성)

  • Park, Sang-Shik
    • Journal of the Korean Ceramic Society
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    • v.49 no.6
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    • pp.642-647
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    • 2012
  • $TiO_2$ thin films for a pulse power capacitor were deposited by RF magnetron sputtering. The effects of the deposition gas ratio and thickness on the crystallization and electrical properties of the $TiO_2$ films were investigated. The crystal structure of $TiO_2$ films deposited on Si substrates at room temperature changed to the anatase from the rutile phase with an increase in the oxygen partial pressure. Also, the crystallinity of the $TiO_2$ films was enhanced with an increase in the thickness of the films. However, $TiO_2$ films deposited on a PET substrate showed an amorphous structure, unlike those deposited on a Si substrate. An X-ray photoelectron spectroscopy(XPS) analysis revealed the formation of chemically stable $TiO_2$ films. The dielectric constant of the $TiO_2$ films as a function of the frequency was significantly changed with the thickness of the films. The films showed a dielectric constant of 100~110 at 1 kHz. However, the dissipation factors of the films were relatively high. Films with a thickness of about 1000nm showed a breakdown strength that exceeded 1000 kV/cm.

Composition-property Relationships of Enamel Glass for Low Carbon Steel

  • Kang, Eun-Tae;Kim, Jong-Po;Cho, Yong-Hyun;Park, Seon-Mi
    • Journal of the Korean Ceramic Society
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    • v.50 no.3
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    • pp.186-194
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    • 2013
  • The relationship between composition and properties of enamel glass was investigated by introducing a mixture design. The enamel glass was manufactured by mixing various components under the following constraints: $45{\leq}SiO_2{\leq}55$, $10{\leq}B_2O_3{\leq}18$, $6{\leq}Na_2O{\leq}15$, $1{\leq}Li_2O{\leq}6$, $5{\leq}K_2O{\leq}10$, $0{\leq}TiO_2{\leq}8$, $0{\leq}ZrO_2{\leq}8$, 13.3MO (mol %). A mathematical model for the calculation of some properties of enamel glasses as a function of their composition was developed by the experimental statistical method. The results showed that the proposed model with the experimental measurement were in good agreement and the mixture experimental design was an effective method for optimizing the composition of the enamel glass with respect to its properties.