• Journal of Korean Society of Transportation
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• v.12 no.3
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• pp.49-64
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• 1994

The development of a mathematical modular framework based on Petri Network theory to model a traffic network is the subject of this paper. Traffic intersections are the primitive elements of a transportation network and are characterized as event driven and asynchronous systems. Petri network have been utilized to model these discrete event systems; further analysis of their structure can reveal information relevant to the concurrency, parallelism, synchronization, and deadlock avoidance issuse. The Petri-net based model of a generic traffic junction is presented. These modular networks are effective in synchronizing their components and can be used for modeling purposes of an asynchronous large scale transportation system. The derived model is suitable for simulations on a multiprocessor computer since its program execution safety is secured. The software pseudocode for simulating a transportation network model on a multiprocessor system is presented.

• Journal of Computing Science and Engineering
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• v.8 no.1
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• pp.43-56
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• 2014

Semi-partitioned scheduling is a new approach for allocating tasks on multiprocessor platforms. By splitting some tasks between processors, semi-partitioned scheduling is used to improve processor utilization. In this paper, a new semi-partitioned scheduling algorithm called SS-DRM is proposed for multiprocessor platforms. The scheduling policy used in SS-DRM is based on the delayed rate monotonic algorithm, which is a modified version of the rate monotonic algorithm that can achieve higher processor utilization. This algorithm can safely schedule any system composed of two tasks with total utilization less than or equal to that on a single processor. First, it is formally proven that any task which is feasible under the rate monotonic algorithm will be feasible under the delayed rate monotonic algorithm as well. Then, the existing allocation method is extended to the delayed rate monotonic algorithm. After that, two improvements are proposed to achieve more processor utilization with the SS-DRM algorithm than with the rate monotonic algorithm. According to the simulation results, SS-DRM improves the scheduling performance compared with previous work in terms of processor utilization, the number of required processors, and the number of created subtasks.

• Journal of Korea Society of Industrial Information Systems
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• v.7 no.5
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• pp.121-128
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• 2002

Although multiprocessor systems are widely used in recent years to run commercial workloads, data sharing patterns are rarely explored due to several difficulties. In this paper, we made in-depth sharing pattern analysis for a representative OLTP application, the TPC-B benchmark, running on a cache-coherent shared-memory multiprocessor system. In addition, to illustrate their effects on the performance, the number of cache misses were measured for various numbers of processors, cache sizes and cache block sizes. From these measurements, we found out the shared data in TPC-B largely bear quite different sharing characteristics from those in scientific applications.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.3_4
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• pp.194-204
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• 2003

The performance of a shared memory multiprocessor system is dependent on the system software such as scheduling policy as well as hardware system. Most of existing simulators, however, do not support simulation for multi-programmed environment because they can execute only a single benchmark application at a time. We propose a multi-programmed simulation method on a program-driven simulator, which enables the concurrent executions of multiple parallel workloads contending for limited system resources. Using the proposed method, system developers can measure and analyze detailed effects of resource conflicts among the concurrent applications as well as the effects of scheduling policies on a program-driven simulator. As a result, the proposed multi-programmed simulation provides more accurate and realistic performance projection to design a multiprocessor system.

• The KIPS Transactions:PartA
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• v.16A no.6
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• pp.437-442
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• 2009

For multiprocessor systems, Earliest Deadline First (EDF) based on deadline and Least Laxity First (LLF) based on laxity are not suitable for practical environment since EDF has low schedulability and LLF has high context switching overhead. As a combining of EDF and LLF to improve the performance, Earliest Deadline Zero Laxity (EDZL) was proposed. EDZL is basically the same as EDF. But if the laxity of a task becomes zero, its priority is promoted to the highest level. In this paper, we propose Least Laxity Zero Laxity (LLZL) which is based on LLF. But context switching is allowed only if the laxity of a task on rady queue becomes zero. Simulation results show that LLZL has high schedulability approaching to LLF and low context switching overhead similar to EDF. In comparison with EDZL, LLZL has better performance in both of schedulability and context switching overhead.

• Journal of the Korea Society of Computer and Information
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• v.4 no.1
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• pp.68-75
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• 1999

In this paper, we propose a Baysian method estimating system reliability which is more effective and precise than conventional methods using prior information. This technique estimates system reliabilities that an entire system and multiprocessing system is normally working in multiprocessor system and multiple port connected memory architecture. The reason is why internetwork with multiprocessor system is mainly connected as multiple bus structure, crossbar switching structure and multiport connected memory structure.

• Journal of the military operations research society of Korea
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• v.17 no.2
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• pp.113-122
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• 1991

This paper presents the Allocation Priority Scheme (APS) for multiprocessor system. The objective of APS is to reduce the time-complexity on a Physical Mapping Scheme(PMS). The PMS is to allocate the nodes of the Data Dependency Graph (DDG) to the multprocessors efficiently and effectively. The APS provides the priority to each node (vertex) in the DDG. In other words, the goal of the APS is to find a request resource mapping such that the total cost (time-complexity) is minimized. The special case in which all requests have equal priorities and all resoruces have equal precedences, and the comparisons between our APS and other schems are discussed in the paper. The APS provides the heuristic rules which are based on maximum height (MH), number of children nodes ($N_c$), number of father nodes ($N_f$), and computation time ($T_c$). The estimation moth of the computaion time is in the paper.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.2
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• pp.19-32
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• 1993

This paper suggests the new high-speed input/output techniques in a shared memory multiprocessor system. The high-speed I/O processor which can connect the different kinds of large sized I/O periperal devices, the communication protocol to the main processing units for I/O operations, and the job scheduling scheme are addressed. This paper also introduces the disk cache technique which supports the slow I/O devices comparing with the main processing units. These techniques were implemented in the TICOM system. The performance evaluation statistics were collected and analyzed for the suggested high-speed I/O processing techniques. These statistics show the superiority of the suggested techniques.

• Proceedings of the Korea Society for Simulation Conference
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• 2003.06a
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• pp.85-88
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• 2003

본 논문에서는 다중 프로세서 시스템에서 부하를 재분배할 때 소요되는 통신비용을 줄이기 위한 알고리즘을 제안한다. 또한 시뮬레이션을 이용하여 제안된 알고리즘의 성능을 기존의 알고리즘과 비교한다. 제안하는 알고리즘에서는 되도록 많은 수의 링크가 부하 평형에 참여 할 수 있도록 한다. 이를 위하여 부하 이동량 계산시에 각 프로세서는 자신과 연결된 모든 링크를 이용하여 부하 평형을 시도한다. 그리고 한 번의 링크를 통해 이동되는 부하 량을 단위 량으로 제한시키는 대신에 반복적인 방법으로 부하 이동량을 계산한다. 시뮬레이션은 8$\times$8, 10$\times$10, 12$\times$12, 14$\times$14, 16$\times$16개의 프로세서를 갖는 메쉬 구조에서 실시하였다. 시뮬레이션 결과 기존의 알고리즘에 비하여 전체 부하 이동량은 약 30%, 부하 이동 시간은 약 70% 감소함을 보였다.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.1
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• pp.41-47
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• 2011

The Pfair scheduling algorithm, which is an optimal scheduling algorithm in the hard real-time multiprocessor environments, propose the necessary and sufficient condition for the schedulability and is based on the fixed quantum size. Recently, several methods that determine the optimal quantum size dynamically were proposed in the mode change environments. But these methods considered only the case in which the period of a task is increased or decreased. In this paper, we also consider the case in which the execution time of a task is increased or decreased, and propose new methods that determine the optimal quantum size dynamically.