• 제목/요약/키워드: multiple bus

검색결과 198건 처리시간 0.028초

A dense local block CNT-FEL BLU with common gate structure

  • Jeong, Jin-Woo;Kim, Dong-Il;Kang, Jun-Tae;Kim, Jae-Woo;Song, Yoon-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.148-150
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    • 2009
  • We have developed 15 inch, 130 blocks local dimming FEL using printed CNT emitters, in which multiple FE blocks were built with a common gate electrode. Cathode electrode formed by the double-metal technique, in which an insulator is interposed between the addressing bus and cathode electrode.

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A Framework for Determining Minimum Load Shedding for Restoring Solvability Using Outage Parameterization

  • Hwachang Song;Lee, Byongjun
    • KIEE International Transactions on Power Engineering
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    • 제4A권2호
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    • pp.73-78
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    • 2004
  • This paper proposes a framework for determining the minimum load shedding for restoring solvability. The framework includes a continuation power flow (CPF) and an optimal power flow (OPF). The CPF parameterizes a specified outage from a set of multiple contingencies causing unsolvable cases, and it traces the path of solutions with respect to the parameter variation. At the nose point of the path, sensitivity analysis is performed in order to achieve the most effective control location for load shedding. Using the control location information, the OPF for locating the minimum load shedding is executed in order to restore power flow solvability. It is highlighted that the framework systematically determines control locations and the proper amount of load shedding. In a numerical simulation, an illustrative example of the proposed framework is shown by applying it to the New England 39 bus system.

온칩네트워크를 활용한 DRAM 동시 테스트 기법 (A Concurrent Testing of DRAMs Utilizing On-Chip Networks)

  • 이창진;남종현;안진호
    • 반도체디스플레이기술학회지
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    • 제19권2호
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    • pp.82-87
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    • 2020
  • In this paper, we introduce the novel idea to improve the B/W usage efficiency of on-chip networks used for TAM to test multiple DRAMs. In order to avoid the local bottleneck of test packets caused by an ATE, we make test patterns using microcode-based instructions within ATE and adopt a test bus to transmit test responses from DRAM DFT (Design for Testability) called Test Generator (TG) to ATE. The proposed test platform will contribute to increasing the test economics of memory IC industry.

비상상태 전압제어를 위한 무효전력보상설비의 최적 운용 (Optimal Operation of Reactive Power Compensation Devices for Voltage Control of Emegency Status)

  • 안창한;백영식
    • 전기학회논문지
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    • 제64권5호
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    • pp.661-666
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    • 2015
  • This paper proposes a method for solving running cost problem by minimizing switching reactive power compensation devices. An objective function was modeled by calculating the weighting value of cost, and a solution was derived using ILP. This paper suggests optimal coordinative control method between FACTS, Shunt Reactors, Capacitors and OLTC. Therefore, it is valuable for decision maker in determining order and capacity of devices which gaining a voltage stabilization. As a result, the objectives of voltage stabilization and cost minimization were achieved simultaneously. This realizes the economic efficiency of the system. We start by showing how to solve systems of linear equations using the language of pivots and tableaus. The effectiveness of this technique is demonstrated in modified PSS/E MIGUM 45 bus system. The simulation results show the effectiveness of this algorithm by comparing the outcome withseveral established methods.

고속데이터 전송을 위한 개선된 Binary CDMA 모뎀 구현 (Improved Binary CDMA Modem Design for High-Speed Wireless Communications)

  • 이장연;조진웅;홍대기
    • 반도체디스플레이기술학회지
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    • 제9권2호
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    • pp.11-14
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    • 2010
  • In this paper, an improved binary-CDMA (Code Division Multiple Access) system for high speed multimedia data transmission will be presented. The improved binary CDMA technology will be used in municipal wireless network. The new name of the system is the Guardian system using a binary CDMA technology. The Guardian system can provide high data rate, and improve its throughput by minimizing latency from the limitation of resources of system bus during multimedia data transmission. Finally, we analyze the performance of Guardian modem according to the report of wireless data transmission test.

복수의 양극성 DC 버스 전압 벨런싱이 가능한 새로운 구조의 DAB 컨버터 (A Dual-Active-Bridge Converter Employing Balancing Capability of Multiple Bipolar DC Bus Voltage Levels)

  • 이준영;정지훈
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2020년도 전력전자학술대회
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    • pp.118-120
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    • 2020
  • 양극성 DC 배전 시스템에는 높은 전압과 낮은 전압을 가진 두 양극성 버스가 사용된다. 두 양극성 버스간의 양방향 전력제어를 위해 DAB 컨버터가 사용된다. 또한, 양극성 DC 버스에는 두 극성에 균등한 전력 흐름이 형성되지 않기 때문에 이를 해결하는 전압 벨런서가 각각의 양극성 DC 버스마다 필요하다. 따라서 양극성 DC 배전 시스템을 구동하기 위해서는 총 3개의 전력변환장치가 필요하고 다수의 장치로 인해 전력밀도와 전력변환효율이 낮아지게 된다. 이러한 문제를 해결하기 위해 복수의 양극성 DC 버스 전압을 벨런싱하고 양방향 전력제어도 가능한 새로운 구조의 DAB 컨버터를 제안한다. 기존의 3단 구조와 달리 전력변환단계를 하나로 줄일 수 있어 전력밀도와 전력변환효율이 상승하게 된다. 제안하는 DAB 컨버터는 입력과 출력에 인덕터를 사용하여 입력과 출력에 접속되는 두 양극성 DC 버스 전압의 벨런싱을 가능하게 한다. 3-kW급 프로토타입을 통해 제안한 컨버터의 성능을 검증한다.

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다중 SoC를 지원하는 JTAG Writer에 관한 연구 (A Study on JTAG Writer for multiple SoCs)

  • 박영리;노영섭
    • 한국정보처리학회:학술대회논문집
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    • 한국정보처리학회 2008년도 추계학술발표대회
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    • pp.810-813
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    • 2008
  • 본 논문에서 연구하고 구현된 JTAG(Joint Test Action Group) Writer는 하나의 SoC(System On a Chip)만 지원하도록 설계된 기존 제품의 단점을 보완할 수 있도록 각 SoC의 제조 회사에서 제공하는 BSDL(Boundary Scan Description Language)을 이용하여 여러 가지 SoC에 쉽게 사용할 수 있도록 모듈화 했다. 그리고 기존 제품들이 사용하고 있는 직렬 포트나 병렬 포트 대신 안정적이고 편리한 USB(Universal Serial Bus) 접속규격을 지원하도록 개선했다.

Development of Transformation-Core for Magnetic Field in Switchgear

  • Gwan-hyung Kim
    • Journal of information and communication convergence engineering
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    • 제21권4호
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    • pp.316-321
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    • 2023
  • In this study, we developed a conversion core that produces power by utilizing the unused magnetic field in a switchboard. The conversion core makes it possible to utilize power that is normally wasted. The conversion core is composed of a core, filter, and battery. A prototype was installed in a switchboard to conduct tests on the output, battery storage, and output boosting of multiple batteries. Energy was harvested from the magnetic field generated by a busbar of the switchboard, and the power conversion ratio of the core yielded 1.08-1.01 mW per 1 A of bus current. Supplying this technology to the market after further R&D and commercialization is expected to greatly assist in the dissemination of energy harvesting, which has not yet spread widely to the general public.

국립공원 이용객의 변동요인과 수요예측 모형설정 (The Variables Affecting the Fluctuation of Visitors and the Construction of Models of Demand Projection in National Park)

  • 정하광
    • 한국조경학회지
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    • 제19권2호
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    • pp.12-22
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    • 1991
  • The purpose of this study is to identify demand and methods of projection, including to prove the variables affecting the fluctuation of visitors and to analyze the relationship between these variables in National Park. Statistical analysis method (Multiple Linear Regression Analysis, ANOVA, and Model diagnostics) was carried out by computer program SAS/pc. 13 variables (1. Total Population, 2. Per Capita PDI, 3. Employment Ratio of S.O.C. & others, 4. NO. of Passenger Car, 5. Length of Roads, 6. Leisure Expenditure of Farm Household, 7. Leisure Expenditure of Urban Household, 8. Price Index, 9. NO. of Bus, 10. Exchange on Dollars, 11. Export, 12. Import, and 13. Visitors in National Park) had been used to this study. The scope of time period is during the last 17 years (1970-1986). The results were as follows; 1) Participation depends only on the specific characteristics of the economic factors (Price Index and Leisure Expenditure of Urban Household). These factors are the importance factors directly affecting the participation of visitors. The statistical Model for projecting the visitors in National Parks is the function of "Visitors in National Parks (thousand)=14915+0.210311*Leisure Expenditure of Urband Household (won)-157.835619*Price Index(1985=100)" 2) The external factors affecting the participation depends upon the interelated features of availability and accessibility (NO. of Passenger Car, Length of Roads, and NO. of Bus) of recreation resources or sites, and the economic factors (Per Capita PDI, Export, and Import). These factors are the factors indirectly affecting the participation of visitors. 3) The participation depends on the specific characteristics of demographic factors (Total Population and Employment Ratio of S.O.C. & others). These factors are the factors indirectly affecting the participation of visitors. 4) The unexpected fluctuation of yearly visitors depends on oil shock or inflation (1971, 1973-1974, 1979-1980), promulgation of national emergency decrees (1971-1972, 1974-1975, 1979-1980), and national events (assassination of president Park's wife, Madame Yuk in 1974 and president Park I 1979).

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하드웨어 지원의 재시도 없는 잠금기법 (Efficient Hardware Support: The Lock Mechanism without Retry)

  • 김미경;홍철의
    • 한국정보통신학회논문지
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    • 제10권9호
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    • pp.1582-1589
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    • 2006
  • 잠금기법은 분산 병렬 시스템의 동기화에 필수적이다. 기존의 큐잉 잠금기법은 최초의 잠금 읽기와 잠금 경합발생 시 공유 데이터에 대한 잠금이 해제되었을 때 발생하는 잠금 읽기 재 시도로 두 개의 트래픽을 발생한다. 본 논문에서는 WPV(Waiting Processor Variable) 잠금기법이라 불리는 새로운 잠금기법을 제안한다 새로이 제안하는 기법은 오직 한 개의 잠금 읽기 명령을 사용한다. WPV 기법은 파이프라인 전송방식을 사용하여 최초의 잠금 읽기 단계에서 공유 데이터가 전송될 때까지 대기 한 후 잠금을 실시한다. 데이터에 대한 잠금을 수행중인 프로세서는 대기 상태의 다음 프로세서에 대한 정보를 저장하고 있으므로, 공유 데이터가 캐쉬 대 캐쉬 데이터 전송 기법에 의하여 대기중인 다음 프로세서로 바로 전송된다. 따라서 대기중인 프로세서 에 대한 변수는 연결 리스트 구조를 갖는다. 제안된 기법은 캐쉬 상태의 잠금기법을 사용하여 잠금 오버 헤드를 줄이고 다중 잠금 경합 발생시 FIFO를 유지하게 한다. 또한 본 논문에서는 기존의 메모리 및 캐쉬 큐잉 잠금기법에 대한 WPV 잠금기법의 해석적 모델링을 제시한다. WPV 잠금기법에 대한 시뮬레이션의 결과는 기존의 큐잉 잠금기법에 비하여 50%의 접근 시간의 감소를 보여주었다.