• Journal of the Korea Society for Simulation
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• v.10 no.1
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• pp.35-50
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• 2001

Managing multi-echelon inventory systems has gained importance over the last decade mainly because integrated control of supply chains consisting of several processing and distribution stages has become feasible through modern information technology. Determination of optimal inventory policy for multi-echelon supply chain is made difficult by the complex interaction between the different levels. In this paper, we investigate performance of five inventory policies (fixed quantity order policy, fixed interval order policy, compromised order policy, lead time-fixed quantity order policy, and mixed order policy) in a multi-echelon supply chain by using a simulation model constructed with AweSim simulation language. The results of the simulation study show that the mixed order policy is the best among five inventory policies in the most test problems except the case when the stockout cost per unit is much higher than the inventory holding and transportation costs per unit.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.1282-1285
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• 2004

The high voltage driving system with multi-phase shifter including piezoelectric actuators comprised a driving power unit for outputting the driving power by converting input alternate current into direct current, a frequency shifting unit for supplying the direct current power and shifting or generating a frequency, a high-voltage amplification unit for amplifying the input signal outputted from the driving power unit and the frequency shifting unit into a high-voltage signal, and a phase shifting unit for shifting the phase difference of the amplified signal applied to the high-voltage amplification unit and driving plural piezoelectric actuators sequentially. The results that the operating voltage was stable, the voltage loss ratio was low and the response velocity was fast could be obtained. An experiment on performance of the high voltage driving system with multi-phase shifter designed and manufactured as above described was conducted by using a piezoelectric pump having 3 sheets of round unimorph piezoelectric actuators laminated respectively in a rectangular case. It sucks any fluid by causing the first piezoelectric actuator to shift from the inlet porter side, the phase delay of 60$^{\circ}$ causes the second piezoelectric actuator to begin to shift, and the phase delay of 120$^{\circ}$ causes the third piezoelectric actuator to begin to shift. As a result of measuring each change in the outlet flow rate of the piezoelectric pump, it was shown that the frequency-flow rate characteristic, the voltage-flow characteristic, and the load pressure-flow rate characteristic were improved.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.26-33
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• 2010

This paper presents a multi-channel capacitive touch sensing unit for SoC applications. This unit includes a simple common processing unit and switch array to detect the touch sensing input by capacitive-time(C-T) conversion method. This touch sensor ASIC is designed based on the Capacitive-Time(C-T) conversion method to have advantages of small current and chip area, and the minimum resolution of the unit is 41 fF per count with the built-in sensing oscillator, LDO regulator and $I^2C$ for no additional external components. This unit is implemented in 0.18 um CMOS process with dual supply voltage of 1.8 V and 3.3 V. The total power consumption of the unit is 60 uA and the area is 0.26 $mm^2$.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.3
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• pp.1390-1395
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• 2014

The objective of this study is to offer a basic data for the establishment of marketing strategies such as fixing price of a new product and creation of the development direction of the product through estimating consumers value by attributes of the newly developed university made multi cream. The Choice Experiment was used for analysis, and conditional logit model was estimated to derive the marginal willingness to pay(MWTP) of each attributes of the multi cream. Brand, container type, functionality, price were included as the attributes. As a result, MWTP were estimated at 21,754 Won/unit for large company product, 11,033 Won/unit for small company product and 16,178 Won/unit for university product, 7,476 Won/unit for enriched moisturizing, 12,107 Won/unit for enriched improvements in wrinkles. Consumers have a preference for university brand over small company brand, therefore, if university and small company cooperate and proceed a joint-venture, it will strengthen the competitive power in the low price brand market. Also, it is essential to develop products with enriched functionalities such as moisturizing and improvements in wrinkles.

• Journal of Broadcast Engineering
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• v.16 no.6
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• pp.1009-1017
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• 2011

Fast generation of digital hologram is of importance for real-time holography broadcasting. In this paper, we propose such a method that parallelizes the Computer-Generated Holography (CGH) algorithm for digital hologram generation and make it faster using Multi Graphic Processing Unit (Multi-GPU) with help of the Compute Unified Device Architecture (CUDA) and the Open Multi-Processing (OpenMP). In addition, we propose optimization methods such as fixation variable, vectorization, and loop unrolling for making the CGH algorithm much faster. Experimental results show that our method is about 9,700 times faster than a CPU-based one.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.10
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• pp.1502-1507
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• 2012

In order to overcome the hardware complexity and power consumption problems, recently the multi-core architecture has been prevalent. For hardware simplicity, usually RISC processor is adopted as the unit core processor. However, if the performance of unit core processor is enhanced, the overall performance of the multi-core processor architecture can be further increased. In this paper, out-of-order superscalar processor is utilized for the multi-core processor architecture. Using SPEC 2000 benchmarks as input, the trace-driven simulation has been performed for the out-of-order superscalar cores between 2 and 16 extensively. As a result, the 16-core out-of-order superscalar processor for the window size of 16 resulted in 17.4 times speed up over the single-core out-of-order superscalar processor, and 50 times speed up over the single core RISC processor. When compared for the same number of cores on the average, the multi-core out-of-order superscalar processor performance achieved 3.2 times speed up over the multi-core RISC processor and 1.6 times speed up over the multi-core in-order superscalar processor.

• Journal of Advanced Marine Engineering and Technology
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• v.39 no.2
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• pp.172-178
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• 2015

Constructing a bilingual multi-word lexicon is confronted with many difficulties such as an absence of a commonly accepted gold-standard dataset. Besides, in fact, there is no everybody's definition of what a multi-word unit is. In considering these problems, this paper evaluates and analyzes the context vector approach which is one of a novel alignment method of constructing bilingual lexicons from parallel corpora, by comparing with one of general methods. The approach builds context vectors for both source and target single-word units from two parallel corpora. To adapt the approach to multi-word units, we identify all multi-word candidates (namely noun phrases in this work) first, and then concatenate them into single-word units. As a result, therefore, we can use the context vector approach to satisfy our need for multi-word units. In our experimental results, the context vector approach has shown stronger performance over the other approach. The contribution of the paper is analyzing the various types of errors for the experimental results. For the future works, we will study the similarity measure that not only covers a multi-word unit itself but also covers its constituents.

• Journal of the Korean Operations Research and Management Science Society
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• v.32 no.1
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• pp.27-51
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• 2007

We analyze the effects of the sellers' strateiges on the final bid prices in internet auctions. We focus on the following three strategies of the seller adoption of the buy-price, setting the starting bid price, and adoption of 'the effective fixed price' which means that the starting bid price is set near the buy-price. In addition, the number of units sold single-unit or multi-unit, and item characteristics, such as whether the food is a search product (functional product) or an experience product (non-functional product), are also considered. We use real data on bids for 4 items from an online auction site. We find that in an auction for experience products when sold as single units, adopting the buy-price strategy raises the final bid price. We also find that in multi-unit auctions, starting the auction at 'the effective fixed price' raises the final bid price.

• Journal of Mechanical Science and Technology
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• v.19 no.5
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• pp.1080-1086
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• 2005

The preliminary design optimization of multi-stage spur gear reduction units has been a subject of considerable interest, since many high-performance power transmission applications (e.g., automotive and aerospace) require high-performance gear reduction units. There are multiple objectives in the optimal design of multi-stage spur gear reduction unit, such as minimizing the volume and maximizing the surface fatigue life. It is reasonable to formulate the design of spur gear reduction unit as a multi-objective optimization problem, and find an appropriate approach to solve it. In this paper an interactive physical programming approach is developed to place physical programming into an interactive framework in a natural way. Class functions, which are used to represent the designer's preferences on design objectives, are fixed during the interactive physical programming procedure. After a Pareto solution is generated, a preference offset is added into the class function of each objective based on whether the designer would like to improve this objective or sacrifice the objective so as to improve other objectives. The preference offsets are adjusted during the interactive physical programming procedure, and an optimal solution that satisfies the designer's preferences is supposed to be obtained by the end of the procedure. An optimization problem of three-stage spur gear reduction unit is given to illustrate the effectiveness of the proposed approach.

• Progress in Superconductivity
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• v.7 no.2
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• pp.109-113
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• 2006

The Arithmetic Logic Unit (ALU) is a core element of a computer processor that performs arithmetic and logic operations on the operands in computer instruction words. We have developed and tested an RSFQ multi-bit ALU constructed with half adder unit cells. To reduce the complexity of the ALU, We used half adder unit cells. The unit cells were constructed of one half adder and three de switches. The timing problem in the complex circuits has been a very important issue. We have calculated the delay time of all components in the circuit by using Josephson circuit simulation tools of XIC, $WRspice^{TM}$, and Julia. To make the circuit work faster, we used a forward clocking scheme. This required a careful design of timing between clock and data pulses in ALU. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. The fabricated 1-bit, 2-bit, and 4-bit ALU circuits were tested at a few kilo-hertz clock frequency as well as a few tens giga-hertz clock frequency, respectively. For high-speed tests, we used an eye-diagram technique. Our 4-bit ALU operated correctly at up to 5 GHz clock frequency.