• Title/Summary/Keyword: modular design

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A Stduy on Model Development of Boiler Combustion System on Coal Fired Power Plant (석탄화력발전소 보일러 연소계통의 모델개발에 관한 연구)

  • Moon, Chae-Joo;Kim, Yong-Gu;Chung, Hwan-Joo
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.18 no.3
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    • pp.65-73
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    • 2004
  • The bolier systems of coal fired power plants are large, non-linear systems with numerous interactions between its component parts. In the analysis of such complex systems, dynamic simulation is recognized as a powerful method of keeping track of the myriad of interactions. The boiler system consists of air/gas system and water/steam system. Due to recent reinforcement of environmental regulation on pollutant discharge and requirements of design validation on properites of boiler, the commercial programs are used for the analysis of boiler system. This paper addressed to the development of model using MMS(Modular Modeling System) developed by EPRI(Electric Power Research Institute) as the simulation tool. The developed model using MMS is tested for the design and local data on boiler combustion system of korea standard coal fired power plant boiler. The simulation results show that the developed model well reproduces responses of the combustion system with less than ${\pm}$5% error under steady state and transient state conditions. The developed model for analysis of the combustion system in this paper is general and applicable to any type of coal fired power plant.

Simulation Environment of DEVS Models using MATLAB/Simulink (MATLAB/Simulink를 이용한 DEVS 모델의 시뮬레이션 환경 구축)

  • Seo, Kyung-Min;Sung, Chang-Ho;Kim, Tag-Gon
    • Journal of the Korea Society for Simulation
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    • v.17 no.4
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    • pp.219-227
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    • 2008
  • The DEVS (Discrete Event Systems Specification) formalism supports specification of discrete event models in a hierarchical modular manner. MATLAB/Simulink is widely used for modeling, simulating and analyzing continuous and discrete time systems. This paper proposes a realization of the DEVS formalism in MATLAB/ Simulink. The proposed design enables to use a great amount of mathematical packages and functions included in MATLAB /Simulink. The design is also employed as real time simulation and hybrid system simulation which is a mixture of continuous systems and discrete event systems. The paper introduces Simulink-DEVS model, in which a simulation algorithm is embedded. The model consists of a Simulink-atomic model and a Simulink-coupled model. In addition, the time advance algorithm to simulate the model is suggested. The algorithm handles the time synchronization and the accommodation of different concepts specific to continuous and discrete event models. Two experimental results are presented for a pure discrete event model and a hybrid model.

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Study on Construction of Quinternary Logic Circuits Using Perfect Shuffle (Perfect Shuffle에 의한 5치 논리회로의 구성에 관한 연구)

  • Seong, Hyeon-Kyeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.3
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    • pp.613-623
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    • 2011
  • In this paper, we present a method on the construction of quinternary logic circuits using Perfect shuffle. First, we discussed the input-output interconnection of quinternary logic function using Perfect Shuffle techniques and Kronecker product, and designed the basic cells of performing the transform matrix and the reverse transform matrix of quinternary Reed-Muller expansions(QRME) using addition circuit and multiplication circuit of GF(5). Using these basic cells and the input-output interconnection technique based on Perfect Shuffle and Kronecker product, we implemented the quinternary logic circuit based on QRME. The proposed design method of QRME is simple and very efficient to reduce addition circuits and multiplication circuits as compared with other methods for same logic function because of using matrix transform based on modular structures. The proposed design method of quinternary logic circuits is simple and regular for wire routing and possess the properties of concurrency and modularity of array.

Design and modelling of pre-cast steel-concrete composites for resilient railway track slabs

  • Mirza, Olivia;Kaewunruen, Sakdirat;Kwok, Kenny;Griffin, Dane W.P.
    • Steel and Composite Structures
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    • v.22 no.3
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    • pp.537-565
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    • 2016
  • Australian railway networks possess a large amount of aging timber components and need to replace them in excess of 280 thousands $m^3$ per year. The relatively high turnover of timber sleepers (crossties in a plain track), bearers (skeleton ties in a turnout), and transoms (bridge cross beams) is responsible for producing greenhouse gas emissions 6 times greater than an equivalent reinforced concrete counterparts. This paper presents an innovative solution for the replacement of aging timber transoms installed on existing railway bridges along with the incorporation of a continuous walkway platform, which is proven to provide environmental, safety and financial benefits. Recent developments for alternative composite materials to replace timber components in railway infrastructure construction and maintenance demonstrate some compatibility issues with track stiffness as well as structural and geometrical track systems. Structural concrete are generally used for new railway bridges where the comparatively thicker and heavier fixed slab track systems can be accommodated. This study firstly demonstrates a novel and resilient alterative by incorporating steel-concrete composite slab theory and combines the capabilities of being precast and modulated, in order to reduce the depth, weight and required installation time relative to conventional concrete direct-fixation track slab systems. Clear benefits of the new steel-concrete composites are the maintainability and constructability, especially for existing railway bridges (or brown fields). Critical considerations in the design and finite element modelling for performance benchmarking of composite structures and their failure modes are highlighted in this paper, altogether with risks, compatibilities and compliances.

Integrated Hybrid Modeling Methodology and Simulation Engine Design Based on HDEVS Formalism (HDEVS 형식론에 기반한 통합 하이브리드 모델링 방법론 및 시뮬레이션 엔진 설계)

  • Kwon, Se Jung;Sung, Changho;Song, Hae-Sang;Kim, Tag Gon
    • Journal of the Korea Society for Simulation
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    • v.22 no.1
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    • pp.21-30
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    • 2013
  • A hybrid system is a combination of sub systems which have different types of state and time: a typical example is a combination of discrete event and continuous systems. A HDEVS(Hybrid DEVS) formalism was proposed for modeling and analyzing a hybrid system. The HDEVS formalism allows modelers to construct a hierarchical and modular model based on the mathematical set theory. Because the HDEVS formalism was applied to the distributed and interoperated simulators, modelers should make several heterogenous models dividing a target system. Hence, this paper proposes an extended hybrid coupled model of HDEVS formalism and an integrated hybrid modeling methodology in contrast to the existing simulation framework on interoperable simulators. By applying the proposed modeling method, a target system can be translated to a hybrid model in a similar form as the target system. This paper also contains a simulation engine design for the proposed modeling methodlogy and a case study which simulates water tank control systems.

Design and Implementation of CAPI System for PSED Using Blaise Software (Blaise 소프트웨어를 이용한 장애인고용패널조사 CAPI 시스템의 설계 및 구현)

  • Lee, Woo-Il
    • Survey Research
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    • v.11 no.1
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    • pp.107-121
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    • 2010
  • The purpose of this paper is to design and implement a Computer Assisted Personal Interviewing (CAPI) system for Panel Survey of Employment for the Disabled (PSED) using Blaise software developed by Statistics Netherlands which is a powerful and flexible system used for computer-assisted survey processing. CAPI system for PSED is consisted of three parts, which are survey management program, electronic questionnaire program, and postprocessing program. These programs are constructed with modular approach and are integrated into CAPI system. The developed software is highlighted in its reusability which results in the improved efficiency and reduced cost of software maintenance. CAPI system for PSED proved its effectiveness in carrying out the survey by guaranteeing correctness of survey data, improved timeliness of survey, easy reforming the questionnaires, easy control on the interviewers, and rapid data processing in spite of the complexity of PSED.

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A Design of a Register Insertion Backbone Ring Network (레이스터 인서션 Backbone 링 네트워크에 관한 연구)

  • 강철신
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.8
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    • pp.796-804
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    • 1992
  • This paper presents a design of a backbone network which uses a rigister-Insertion ring structure, The introduction of a high speed register in sertton backbone ring enables high performance inter-network 4ommunicatlons In a simple and modular structure at low cost and Its concurrent communications.. Two or more bridge nodes can be used to construct a register Insertion backbone ring network. The high bandwidth of the backbone ring sup ports heavy traffic for Inter-segment Eornrnunicatlons. The bridge node does both local address filtering to block data entering the ring and remote address filtering to block data entering the local LAN segment . Title local address greatly reduces the rate on the backbone ring and the remote address filterlng greatly reduces the traffic rate on each LAN segment. An feature makes the network the network reconflguratlon simpler and transparent to users. A throughput analysis Is used to deterrune the bandwidth of the backbone rlr)g transmission medium.

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Design of MSB-First Digit-Serial Multiplier for Finite Fields GF(2″) (유한 필드 $GF(2^m)$상에서의 MSB 우선 디지트 시리얼 곱셈기 설계)

  • 김창훈;한상덕;홍춘표
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.6C
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    • pp.625-631
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    • 2002
  • This paper presents a MSB-first digit-serial systolic array for computing modular multiplication of A(x)B(x) mod G(x) in finite fields $GF(2^m)$. From the MSB-first multiplication algorithm in $GF(2^m)$, we obtain a new data dependence graph and design an efficient digit-serial systolic multiplier. For circuit synthesis, we obtain VHDL code for multiplier, If input data come in continuously, the implemented multiplier can produce multiplication results at a rate of one every [m/L] clock cycles, where L is the selected digit size. The analysis results show that the proposed architecture leads to a reduction of computational delay time and it has much more simple structure than existing digit-serial systolic multiplier. Furthermore, since the propose architecture has the features of unidirectional data flow and regularity, it shows good extension characteristics with respect to m and L.

VLIS Design of OCB-AES Cryptographic Processor (OCB-AES 암호 프로세서의 VLSI 설계)

  • Choi Byeong-Yoon;Lee Jong-Hyoung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.8
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    • pp.1741-1748
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    • 2005
  • In this paper, we describe VLSI design and performance evaluation of OCB-AES crytographic algorithm that simulataneously provides privacy and authenticity. The OCB-AES crytographic algorithm sovles the problems such as long operation time and large hardware of conventional crytographic system, because the conventional system must implement the privancy and authenticity sequentially with seqarated algorithms and hardware. The OCB-AES processor with area-efficient modular offset generator and tag generator is designed using IDEC Samsung 0.35um standard cell library and consists of about 55,700 gates. Its cipher rate is about 930Mbps and the number of clock cycles needed to generate the 128-bit tags for authenticity and integrity is (m+2)${\times}$(Nr+1), where m and Nr represent the number of block for message and number of rounds for AES encryption, respectively. The OCB-AES processor can be applicable to soft cryptographic IP of IEEE 802.11i wireless LAN and Mobile SoC.

Design and Realization of a Digital PV Simulator with a Push-Pull Forward Circuit

  • Zhang, Jike;Wang, Shengtie;Wang, Zhihe;Tian, Lixin
    • Journal of Power Electronics
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    • v.14 no.3
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    • pp.444-457
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    • 2014
  • This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.