• Title/Summary/Keyword: mode switching level

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A Switching Technique for Common Mode Voltage Reduction of 2-Level Inverter

  • Yun Hwan-Kyun;Kim Lee-Hun;Kim Jun-Ho;Won Chung-Yuen;Choi Gi-Su;Bae Joung-Hwan
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.438-442
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    • 2001
  • Much attention has given to EMI effects created by variable speed ac drive system. This paper focuses on the switching technique to mitigate common mode voltage. Zero switching states of inverter control invoke large common mode voltage. Using inversed carrier wave, zero switching states are removed. In addition, proposed technique is easy to apply to existing 2-level inverter design. And common mode mitigation technique for sinusoidal PWM is also presented. Proposed switching technique is implemented with a 2.2kw 1735rpm induction motor.

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A Switching Technique for Common Mode Voltage Reduction of 2-Level Inverter (2-레벨 인버터의 전도노이즈 저감을 위한 스위칭 기법)

  • Yun Hwan-Kyun;Kim Lee-Hun;Kim Jun-Ho;Won Chung-Yuen;Choi Ki-Soo;Bae Joung-Hwan
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.434-437
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    • 2001
  • Much attention has given to EMI effects created by variable speed ac drive system. This paper focuses on the switching technique to mitigate common mode voltage. Zero switching states of inverter control invoke large common mode voltage. Using inversed carrier wave, zero switching states are removed. In addition, proposed technique is easy to apply to existing 2-level inverter design. Simulation results show that common mode voltages adapting proposed technique are reduced regarding conventional method.

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Novel Single-State PWM Technique for Common-Mode Voltage Elimination in Multilevel Inverters

  • Nguyen, Nho-Van;Quach, Hai-Thanh;Lee, Hong-Hee
    • Journal of Power Electronics
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    • v.12 no.4
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    • pp.548-558
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    • 2012
  • In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.

Performance Analysis of Mode Switching Scheme for Reduction of Phase Distortion in GPS Anti-jamming Equipment Based on STAP Algorithm

  • Jung, Junwoo;Yang, Gi-Jung;Park, Sungyeol;Kang, Haengik;Kwon, Seungbok;Kim, Kap Jin
    • Journal of Positioning, Navigation, and Timing
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    • v.8 no.3
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    • pp.95-105
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    • 2019
  • A method that applies space-time adaptive signal processing (STAP) algorithm based on an array antenna consisting of multiple antenna elements has been known to be effective to remove wide-band jamming signals in GPS receivers. However, the occurrence of phase distortion in navigation signals has been a problem when navigation signals, from which jamming signals are removed using STAP, are supplied to global positioning system (GPS) receivers. This paper verified the navigation performance degradation as a result of phase distortion. To mitigate this phenomenon, this paper proposes a mode switching scheme, in which a bypass mode is adopted to make the best use of the tracking performance of receivers without performing signal processing when jamming signals are not present or weak, and a STAP mode is employed when jamming signals exceed the threshold value. In this paper, the mode switching scheme is proposed for two environments: when receivers are stationary, and when receivers are moving. This paper confirmed that the performance of position error improved because phase distortion could be excluded due to STAP if the bypass mode was adopted under a condition where the jamming signal power level was below the threshold value in an environment where receivers were stationary. However, this paper also observed that the navigation failed due to the instability of tracking performance of receivers due to phase distortion that occurred at the switching time, although the number of switching could be reduced dramatically by proposing a dual threshold scheme of on- and off-thresholds that switched a mode due to the array antenna characteristics of varying gains according to the jamming signal incident direction in an environment where receivers were moving. The analysis results verified that running the STAP algorithm at all times is more efficient than the mode switching, in terms of maintaining stable navigation and ensuring position error performance, to remove jamming signals in an environment where receivers were moving.

An Optimal Determination of Subband-Frame Size and Mode Switching Level for Adaptive OFDM-TDD System (시분할 듀플렉싱 기반의 적응 직교 주파수 분할 다중 접속 시스템에서 부대역-프레임 크기와 모드 변환점의 최적 결정 기법)

  • Shin Kil-Ho;Lee Chang-Suk;Kim Jung-Gon;Kim Hyung-Myung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6C
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    • pp.512-522
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    • 2005
  • In this paper, an optimal determination method of the subband-frame size and mode-switching level is proposed for adaptive OFDM-TDD systems in frequency-selective time-varying channels. The optimization problem considering frequency selectivity. user's mobility, and the signaling overhead caused by the mode change information is formulated in the maximum spectral efficiency sense satisfying the target BER. Assuming that subband-frame size is given, the mode-switching level is first optimized so that the spectral efficiency can be maximized satisfying the target BER. The subband-frame size among candidates is then determined, which maximizes the spectral efficiency. Simulation results show that the proposed scheme outperforms conventional schemes, in terms of the spectral efficiency and the BER.

Carrier Based Common Mode Voltage Reduction Techniques in Neutral Point Clamped Inverter Based AC-DC-AC Drive System

  • Ojha, Amit;Chaturvedi, Pradyumn;Mittal, Arvind;Jain, Shailendra
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.142-152
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    • 2016
  • Common mode voltage (CMV) generation is a major problem in switching power converter fed induction motor drive systems. CMV is the zero sequence voltage generated due to the switching action of power converters. Even a small magnitude of CMV with a high rate of change may circulate large bearing currents which may damage a machine's bearings and shorten its life. There are several methods of controlling CMV. This paper presents 3-level sinusoidal pulse width modulation based techniques to control the magnitude and rate of change of CMV in multilevel AC-DC-AC drive systems. Simulation and experimental investigations have been presented to validate the performance of proposed technique to control CMV in 3-level neutral point clamped inverter based AC-DC-AC system.

A Study on a Carrier Based PWM having Constant Common Mode Voltage and Minimized Switching Frequency in Three-level Inverter

  • Ahn, Kang-Soon;Choi, Nam-Sup;Lee, Eun-Chul;Kim, Hee-Jun
    • Journal of Electrical Engineering and Technology
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    • v.11 no.2
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    • pp.393-404
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    • 2016
  • In this paper, a carrier-based pulse with modulation (PWM) strategy for three-phase three-level inverter is dealt with, which can keep the common mode voltage constant with minimized switching frequency. The voltage gain and the switching frequency in overall operating ranges including overmodulation are investigated and the analytic equations are presented. Finally, the leakage current reduction effect is confirmed by carrying out simulation and experiment. It will be pointed out that the leakage current cannot be perfectly eliminated because of the dead time.

New Generalized PWM Schemes for Multilevel Inverters Providing Zero Common-Mode Voltage and Low Current Distortion

  • Nguyen, Nho-Van;Nguyen, Tam-Khanh Tu
    • Journal of Power Electronics
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    • v.19 no.4
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    • pp.907-921
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    • 2019
  • This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

HID Ballast using Soft Switching Multi Level Inverter (Soft Switching Multi Level Inverter를 이용한 HID용 Ballast)

  • Lee Jang-Sun;Kim Yoon-Ho;Kim Soo-Hong
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.6
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    • pp.628-634
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    • 2004
  • The soft switching is applied to the multi-level inverter to enhance the characteristics of HID(High Intensity Discharge) Ballast in headlight of vehicle. The electrical properties are investigated. The available modeling of the ballast in steady-state is calculated using mathematical method and the result is used in analyzing the power characteristics and design of the system. Finally the designed system md modeling is confirmed by the experiment.

Full ZVS Load Range Diode Clamped Three-level DC-DC Converter with Secondary Modulation

  • Shi, Yong
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.93-101
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    • 2016
  • A new four-primary-switch diode clamped soft switching three-level DC-DC converter (TLDC) with full zero-voltage switching (ZVS) load range and TL secondary voltage waveform is proposed. The operation principle and characteristics of the presented converter are discussed, and experimental results are consistent with theoretical predictions. The improvements of the proposed converter include a simple and compact primary structure, TL secondary rectified voltage waveform, wide load range ZVS for all primary switches, and full output-regulated range with soft switching operation. The proposed converter also has some disadvantages. The VA rating of the transformer is slightly larger than that of conventional TLDCs in variable input and constant output mode. The conduction loss of the primary coil is slightly higher because an air gap is inserted into the magnetic cores of the transformer. Finally, the secondary circuit is slightly complex.