• 제목/요약/키워드: minority carrier lifetime

검색결과 90건 처리시간 0.027초

질화된 MOS 커패시터의 C-T 특성 (C-T Characteristics of Nitridized MOS Capacitor)

  • 장의구;최원은;서용진;최현식;유석빈
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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    • pp.788-791
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    • 1988
  • The C-T characteristics of nitridized MOS capacitor have been studied. The generation lifetimes were calculated using C-T transient response ans found to vary as sample condition. This is due to the non-uniformity of fast surface state. Also, This experimental curves were different from theoretical curves. The result suggests that the change in material structure (from SiO2 to Si-N-O) is important in improving minority carrier lifetime.

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PECVD 공정을 이용한 후면 패시베이션 및 결정질 실리콘 태양전지 적용에 관한 연구 (A Study on the Application of Thin Film Passivation and Crystalline Silicon Solar Cells Using PECVD Process)

  • 김관도
    • 반도체디스플레이기술학회지
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    • 제19권2호
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    • pp.68-71
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    • 2020
  • In this study, SiNx and Al2O3 thin film was manufactured using PECVD deposition process and applied to crystalline silicon solar cells, resulting in 16.7% conversion efficiency. The structural improvement experiment of the rear electrode resulted in a 1.7% improvement in conversion efficiency compared to the reference cell by reducing the recombination rate of minority carriers and increasing the carrier lifetime by forming a passivation layer consisting of SiNx and Al2O3 thin films through the PECVD process.

고속전철용 고전압 IGCT소자의 전기적 특성 (Electrical Characteristics of High Voltage IGCT Devices for Rapid Electronic Railway)

  • 김상철;서길수;김형우;김은동
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 C
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    • pp.1556-1558
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    • 2003
  • IGCT devices is a superior devices for power conversion purpose. The basic structure of the IGCT devices is same as that of GTO thyristor. This makes the blocking voltage higher and controllable on-state current higher. In this paper, we present static and dynamic characteristics of 4.5 kV PT-type IGCT devices as a function of minority carrier lifetime, n-base thickness and n-buffer thickness. We should choose proper structural parameters for good electrical characteristics of GCT devices.

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THE EFFECT OF DOPANT OUTDIFFUSION ON THE NEUTRAL BASE RECOMBINATION CURRENT IN Si/SiGe/Si HETEROJUNCTION BIPOLAR TRANSISTORS

  • Ryum, Byung-R.;Kim, Sung-Ihl
    • ETRI Journal
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    • 제15권3_4호
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    • pp.61-69
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    • 1994
  • A new analytical model for the base current of Si/SiGe/Si heterojunction bipolar transistors(HBTs) has been developed. This model includes the hole injection current from the base to the emitter, and the recombination components in the space charge region(SCR) and the neutral base. Distinctly different from other models, this model includes the following effects on each base current component by using the boundary condition of the excess minority carrier concentration at SCR boundaries: the first is the effect of the parasitic potential barrier which is formed at the Si/SiGe collector-base heterojunction due to the dopant outdiffusion from the SiGe base to the adjacent Si collector, and the second is the Ge composition grading effect. The effectiveness of this model is confirmed by comparing the calculated result with the measured plot of the base current vs. the collector-base bias voltage for the ungraded HBT. The decreasing base current with the increasing the collector-base reverse bias voltage is successfully explained by this model without assuming the short-lifetime region close to the SiGe/Si collector-base junction, where a complete absence of dislocations is confirmed by transmission electron microscopy (TEM)[1].The recombination component in the neutral base region is shown to dominate other components even for HBTs with a thin base, due to the increased carrier storage in the vicinity of the parasitic potential barrier at collector-base heterojunction.

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실리콘 전하선택접합 태양전지 적용을 위한 원자층 증착법으로 증착된 VOx 박막의 특성 (Characteristics of Vanadium Oxide Grown by Atomic Layer Deposition for Hole Carrier Selective Contacts Si Solar Cells)

  • 박지혜;장효식
    • 한국재료학회지
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    • 제30권12호
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    • pp.660-665
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    • 2020
  • Silicon heterojunction solar cells can achieve high conversion efficiency with a simple structure. In this study, we investigate the passivation characteristics of VOx thin films as a hole-selective contact layer using ALD (atomic layer deposition). Passivation characteristics improve with iVoc (implied open-circuit voltage) of 662 mV and minority carrier lifetime of 73.9 µs after post-deposition annealing (PDA) at 100 ℃. The improved values are mainly attributed to a decrease in carbon during the VOx thin film process after PDA. However, once it is annealed at temperatures above 250 ℃ the properties are rapidly degraded. X-ray photoelectron spectroscopy is used to analyze the chemical states of the VOx thin film. As the annealing temperature increases, it shows more formation of SiOx at the interface increases. The ratio of V5+ to V4+, which is the oxidation states of vanadium oxide thin films, are 6:4 for both as-deposition and annealing at 100 ℃, and 5:5 for annealing at 300 ℃. The lower the carbon content of the ALD VOx film and the higher the V5+ ratio, the better the passivation characteristics.

전하선택접촉 태양전지 적용을 위한 VOx 박막, NiOx 박막, CuIx 박막의 특성 연구 (Characteristics of VOx Thin Film, NiOx Thin Film, and CuIx Thin Film for Carrier Selective Contacts Solar Cells)

  • 전기석;김민섭;이은비;신진호;임상우;정채환
    • Current Photovoltaic Research
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    • 제11권2호
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    • pp.39-43
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    • 2023
  • Carrier-selective contacts (CSCs) solar cells are considerably attractive on highly efficient crystalline silicon heterojunction (SHJ) solar cells due to their advantages of high thermal tolerance and the simple fabrication process. CSCs solar cells require a hole selective contact (HSC) layer that selectively collects only holes. In order to selectively collect holes, it must have a work function characteristic of 5.0 eV or more when contacted with n-type Si. The VOx, NiOx, and CuIx thin films were fabricated and analyzed respectively to confirm their potential usage as a hole-selective contact (HSC) layer. All thin films showed characteristics of band-gap engergy > 3.0 eV, work function > 5.0 eV and minority carrier lifetime > 1.5 ms.

DRE 공정이 태양전지용 재생웨이퍼 특성에 미치는 영향 (Characteristics of Recycled Wafer for Solar Cell According to DRE Process)

  • 정동건;공대영;윤성호;서창택;이윤호;조찬섭;김봉환;배영호;이종현
    • 한국진공학회지
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    • 제20권3호
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    • pp.217-224
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    • 2011
  • 최근, 결정질 실리콘 태양전지 분야에서 저가격화와 공정의 단순화가 가장 중요한 부분으로 대두되고 있다. 특히 태양전지 가격의 대부분을 차지하고 있는 웨이퍼의 저가격화가 가장 큰 이슈로 떠오르면서, 웨이퍼의 저가격화를 실현하기 위한 최선의 방안으로 마이크로 블라스터를 이용한 재생웨이퍼 제작 방법이 대두되고 있다. 마이크로 블라스터를 이용하여 재생웨이퍼를 제작 할 경우, 표면의 요철이 형성되어 반사율이 감소되어 태양전지 내부로 입사하는 빛의 양을 증가시키는 긍정적인 효과가 있다. 또한, 공정비용이 저렴하여 태양전지 저가격화를 실현할 수 있다. 그러나, 마이크로 블라스터를 이용한 공정은 웨이퍼에 물리적인 충격을 주기 때문에 표면에 크랙이 형성되며 식각 잔여물들이 표면에 재흡착되는 단점이 있다. 본 연구에서는 이러한 단점들을 보완하기 위하여 DRE (Damage Remove Etching)를 수행하였다. DRE 공정 후 반사율과 소수 반송자 수명을 측정하여 미세 파티클과 마이크로 크랙의 제거를 확인하였고, 태양전지를 제작하여 효율에 미치는 영향을 분석하였다. 마이크로 블라스터 공정 후 웨이퍼의 소수 반송자 수명은 Bare 웨이퍼에 비해 80% 정도 감소하였으나, DRE 공정 수행 후에는 50% 까지 증가하였음을 확인할 수 있었다. 태양전지 효율을 비교해보면, DRE 공정을 수행한 웨이퍼의 경우 Bare 웨이퍼보다 약 1~2%, DRE 공정을 수행하지 않은 웨이퍼보다 약 3∼5% 증가했음을 확인하였다.

Analysis of wet chemical tunnel oxide layer characteristics capped with phosphorous doped amorphous silicon for high efficiency crystalline Si solar cell application

  • Kang, Ji-yoon;Jeon, Minhan;Oh, Donghyun;Shim, Gyeongbae;Park, Cheolmin;Ahn, Shihyun;Balaji, Nagarajan;Yi, Junsin
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.406-406
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    • 2016
  • To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

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UMG 실리콘 태양전지의 패시베이션 공정 연구 (Optimization of Passivation Process in Upgraded Metallurgical Grade (UMG)-Silicon Solar Cells)

  • 장효식;김유진;김진호;황광택;최균;안종형
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.438-438
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    • 2009
  • We have investigated the effect of forming gas annealing for Upgraded Metallurgical Grade (UMG)-silicon solar cell in order to obtain low-cost high-efficiency cell using post deposition anneal at a relatively low temperature. We have observed that high concentration hydrogenation effectively passivated the defects and improved the minority carrier lifetime, series resistance and conversion efficiency. It can be attributed to significantly improved hydrogen-passivation in high concentration hydrogen process. This improvement can be explained by the enhanced passivation of silicon solar cell with antireflection layer due to hydrogen re-incorporation. The results of this experiment represent a promising guideline for improving the high-efficiency solar cells by introducing an easy and low cost process of post hydrogenation in optimized condition.

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실리콘 산화막의 두께에 따른 ALD $Al_2O_3$ 박막의 passivation 효과 (Passivation Quality of ALD $Al_2O_3$ Thin Film via Silicon Oxide Interfacial Layer for Crystalline Silicon Solar Cells)

  • 김영도;박성은;탁성주;강민구;권순우;윤세왕;김동환
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2009년도 춘계학술대회 논문집
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    • pp.93-93
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    • 2009
  • 실리콘 태양전지의 효율 향상을 위한 노력의 일환으로 결정질 실리콘 웨이퍼 표면passivation 물질 중 Atomic Layer Deposition (ALD)을 이용하여 증착한 $Al_2O_3$ 박막에 대한 관심이 증가하고 있다. 본 연구에서는 $Al_2O_3$ 박막의 증착 전 실리콘 웨이퍼의 산화막 두께에 따른 passivation 효과에 대해서 연구하였다. 실리콘 산화막은 $HNO_3$ 용액을 사용하여 화학적으로 생성시켰으며 $HNO_3$ 용액과의 반응 시간을 조절하여 실리콘 산화막의 두께를 조절하였다. 실리콘 산화막 생성 후 ALD로 $Al_2O_3$ 박막을 증착하였으며 증착 후 $N_2$ 분위기에서 annealing 하였다. Annealing 후 passivation 효과는 Quasi-Steady-State Photo Conductance를 사용하여 minority carrier의 lifetime을 측정하였다. Capacitance-Voltage measurement, Transmission Electron Microscopy, Ellipsometry를 사용하여 실리콘 산화막의 두께에 따른 $Al_2O_3$ 박막의 passivation 효과를 분석하였다.

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