• 한국재료학회:학술대회논문집
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• 한국재료학회 1993년도 추계 학술발표 강연 및 논문 개요집
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• pp.10-10
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• 1993

• 한국분말재료학회지
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• 제4권1호
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• pp.1-8
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• 1997

• 한국진공학회:학술대회논문집
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• 한국진공학회 2002년도 제23회 학술발표회 초록집
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• pp.191-193
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• 2002

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.99.1-99.1
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• 2016

The materials for an electronic packaging provide diverse important functions including electrical contact to transfer signals from devices, isolation to protect from the environment and a path for heat conduction away from the devices. The packaging materials composed of metals, ceramics, polymers or combinations are crucial to the device operating properly and reliably. The demand of effective charge and heat transfer continuous to be challenge for the high-speed and high-power devices. Nanomaterials including graphene, carbon nanotube and boron nitride, have been designed for the purpose of exploiting the high thermal, electrical and mechanical properties by combining in the matrix of metal or polymer. In addition, considering the inherent electrical and surface properties of graphene, it is expected that graphene would be a good candidate for the surface layer of a template in the electroforming process. In this talk, I will present recent our on-going works in nanomaterials for microelectronic packaging: 1) porous graphene/Cu for heat dissipations, 2) carbon-metal composites for interconnects and 3) nanomaterials-epoxy composites as a thermal interface materials for electronic packaging.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 춘계학술대회 논문집 센서 박막재료 반도체재료 기술교육
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• pp.1-6
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• 2002

Plasma processing of semiconductor materials plays a dominant role in microelectronic technology. During last century, plasma have gone a way from laboratory phenomena to industrial applications due to intensive progress in both scientific and industrial trends. Improvement and development of new experience together with development of plasma theory and plasma diagnostics methods. A most parameters (pressure, flow rate, power density) and various levels of plasma system (energy distribution, volume gas chemistry, transport, heterogeneous effects) to understand the whole process mechanism. It will allow us to choose a correct ways for processes optimization.

• 한국재료학회지
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• 제26권9호
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• pp.455-459
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• 2016

The deposition process for the gap-filling of sub-micrometer trenches using DMDMOS, $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by flowable chemical vapor deposition (F-CVD) is presented. We obtained low-k films that possess superior gap-filling properties on trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on IMD and STI for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universal in other chemical vapor deposition systems.

• 한국진공학회지
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• 제5권2호
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• pp.161-168
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• 1996

For the improvement of microelectronic thin film interconnection materials, dielectric passivation effects on the electromigration phenomena were studied. Using Al-1%Si, various shaped patterns were fabricated and dielectric passivation layers of several structures were deposited on the $SiO_2$ layer. Lifetime of straight pattern showed 2~5 times longer than the other patterns that had various line width and area. It is believed that the flux divergence due to the structural inhomogeneity and so the current crowding effects shorten the lifetime of thin film interconnections. The lifetime of thin film interconnections seems to depend on both the passivation materials and the passivation thickness. PSG/$SiO_2$ dielectric passivation layers showed longer lifetime than $Si_3N_4$ dielectric passivation layers. This results from the PSG on $SiO_2$ layer reduces stress and from the improvement of resistance to the moisture and to the mobile ion such as sodium. This is also believed that the lifetime of thin film interconnections seems to depend on the passivation thickness in case of the same deposition materials.

• 한국공작기계학회논문집
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• 제17권1호
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• pp.137-143
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• 2008

Thermal fatigue life prediction for solder joints becomes the most critical issue in present microelectronic packaging industry. And lead-free solder is quickly becoming a reality in electronic manufacturing fields. This trend requires life prediction models for new solder alloy systems. This paper describes the life prediction models for SnAgCu and SnPb solder joints, based upon non-linear finite element analysis (FEA). In case of analyses of the SnAgCu solder joints, two kinds of shapes are used. As a result, it is found that the SnAgCu solder has longer fatigue life than the SnPb solder in temperature cycling analyses.

• Transactions on Electrical and Electronic Materials
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• 제2권3호
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• pp.28-32
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• 2001

It was studied in the present work how the thermal cycling performance of LOC (lead on chip) packages depends on the package construct or leadframe materials. First, package body thickness and Au wire diameter were manipulated for the selection of proper package design. Secondly, two different types of leadframe materials (i.e. copper and 52%Fe-48%Ni alloy) were tested to determine the better material for improved reliability margin of plastically encapsulated microelectronic packages. This work shows that manipulating package body thickness was more effective than an increase of Au wire from 23$\mu\textrm{m}$ to 33$\mu\textrm{m}$ for the prevention of wire debonding failure. Further, this work indicates that the LOC packages including the copper leadframes can be more susceptible to thermal cycling reliability degradation due to chip cracking than those including the alloy leadframes.

• Journal of Korean Vacuum Science & Technology
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• 제7권2호
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• pp.39-44
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• 2003

Recent ULSI and multilevel structure trends in microelectronic devices minimize the line width down to a quarter micron and below, which results in the high current densities in thin film interconnections. Under high current densities, an EM(electromigration) induced failure becomes one of the critical problems in a microelectronic device. This study is to improve thin film interconnection materials by investigating the EM characteristics in PSG(phosphosilicate glass)/SiO$_2$ passivated Al-l%Si thin film interconnections. Straight line patterns, wide and narrow link type patterns, and meander type patterns, etc. were fabricated by a standard photholithography process. The main results are as follows. The current crowding effects result in the decrease of the lifetime in thin film interconnections. The electric field effects accelerate the decrease of lifetime in the double-layered thin film interconnections. The lifetime of interconnections also depends upon the current conditions of P.D.C.(pulsed direct current) frequencies applied at the same duty factor.