• Title/Summary/Keyword: memory test

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Effect of Cold Rolling on Fatigue Crack Propagation of TiNi/A16061 Shape Memory Composite (TiNi/A16061 형상기억복합재료의 피로균열진전에 대한 냉간압연효과)

  • Lee Jin-Kyung;Park Young-Chul;Lee Kyu-Chang;Lee Sang-Pill;Cho Youn-Ho;Lee Joon-Hyun
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.29 no.10 s.241
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    • pp.1315-1320
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    • 2005
  • TiNi alloy fiber was used to recover the original shape of materials using its shape memory effect. The shape memory alloy plays an important role within the metal matrix composite. The shape memory alloy can control the crack propagation in metal matrix composite, and improve the tensile strength of the composite. In this study, TiNi/A16061 shape memory alloy(SMA) composite was fabricated by hot press method, and pressed by a roller for its strength improvement. The four kinds of specimens were fabricated with $0\%,\;3.2\%,\;5.2\%\;and\;7\%$ and volume fraction of TiNi alloy fiber, respectively. A fatigue test has performed to evaluate the crack initiation and propagation for the TiNi/A16061 SMA composite fabricated by かis method. In order to study the shape memory effect of the TiNi alloy fiber, the test has also done under both conditions of the room temperature and high temperature. The relationship between the crack growth rate and the stress intensity factor was clarified for the composite, and the cold rolling effect was also studied.

An Alternative State Estimation Filtering Algorithm for Temporarily Uncertain Continuous Time System

  • Kim, Pyung Soo
    • Journal of Information Processing Systems
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    • v.16 no.3
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    • pp.588-598
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    • 2020
  • An alternative state estimation filtering algorithm is designed for continuous time systems with noises as well as control input. Two kinds of estimation filters, which have different measurement memory structures, are operated selectively in order to use both filters effectively as needed. Firstly, the estimation filter with infinite memory structure is operated for a certain continuous time system. Secondly, the estimation filter with finite memory structure is operated for temporarily uncertain continuous time system. That is, depending on the presence of uncertainty, one of infinite memory structure and finite memory structure filtered estimates is operated selectively to obtain the valid estimate. A couple of test variables and declaration rule are developed to detect uncertainty presence or uncertainty absence, to operate the suitable one from two kinds of filtered estimates, and to obtain ultimately the valid filtered estimate. Through computer simulations for a continuous time aircraft engine system with different measurement memory lengths and temporary model uncertainties, the proposed state estimation filtering algorithm can work well in temporarily uncertain as well as certain continuous time systems. Moreover, the proposed state estimation filtering algorithm shows remarkable superiority to the infinite memory structure filtering when temporary uncertainties occur in succession.

Development of proton test logic of RFSoC and Evaluation of SEU measurement (RFSoC의 양성자 시험 로직 개발 및 SEU 측정 평가)

  • Seung-Chan Yun;Juyoung Lee;Hyunchul Kim;Kyungdeok Yu
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.24 no.1
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    • pp.97-101
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    • 2024
  • In this paper, we present the implementation of proton beam irradiation test logic and test results for Xilinx's RFSoC FPGA. In addition to the FPGA function, RFSoC is a chip that integrates CPU, ADC, and DAC and is attracting attention in the defense and space industries aimed at reducing the size of the chip. In order to use these chips in a space environment, an analysis of radiation effects was required and radiation mitigation measures were required. Through the proton irradiation test, the logic to measure the radiation effect of RFSoC was designed. Logic for comparing values stored in memory with normal values was implemented, and protons were irradiated to RFSoC to measure SEU generated in the block memory area. To alleviate the occurrence of SEU in other areas, TMR and SEM were applied and designed. Through the test results, we intend to verify this test configuration and establish an environment in which logic design for satellites can be verified in the future.

Effects of Gamisinsunbulo-dan on Learning and Memory Function in the Dementia Rat by Ibotenic acid Damage (가미신선부노단이 ibotenic acid손상에 의해 유도된 치매 백서의 학습 및 기억장애에 미치는 영향)

  • Eom Hyun Sup
    • Journal of Physiology & Pathology in Korean Medicine
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    • v.16 no.6
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    • pp.1151-1156
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    • 2002
  • This research was done to make the effective prescription and cope with various senile dementia. Sprague-Dawley rats were injured by ibotenic acid to make a damage on learning and memory functions of model rats. At first acquisition test and retention rest were done in the Morris water maze. And to evaluate the effects of the sample drug(GSD) on choline acetyltranferase and acetylcholine esterase, immunoreactive measurement and enzymatic activity measuring were carried out. The ibotenic acid were injected to hippocampus CA1 and CA3 area. Conclusion : GSD improved the learning ability in the acquisition test and memory function in the retention test significantly. And GSD increased the level of ChAT which is synthesizing acetylcholine in CA1 area, and at the same time it increased the level of AChE which is resolving acetylcholine. These results show that GSD improved the cholinergic catabolism and anabolism, and the increment of metabolic activity of cholinergic system. In other words, it contributes to the recovery of damaged learning and memory function by ibotenic acid. So it can be concluded that GSD will be helpful to cholinergic brain damage induced by primary or senile reduction of acetylcholine secretive activity.

Working Memory Deficits in Ultra-High Risk for Psychosis and Schizophrenia (조현병 및 정신증 고위험군에서의 작업기억 손상)

  • Jeon, Im Hong;Park, Jong Suk;Park, Jin Young;Cho, Hye Hyun;Koo, Se Jun;Lee, Eun;An, Suk Kyoon;Yoo, Sun Kook
    • Korean Journal of Schizophrenia Research
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    • v.15 no.2
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    • pp.66-72
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    • 2012
  • Objectives : The aim of this study was to investigate whether verbal and spatial working memory functions were impaired not only in patients with schizophrenia but also in people at ultra-high risk for first-episode psychosis. Methods : Twenty-five patients (M 13, F 12) with schizophrenia (SPR), 21 people at ultra-high risk for psychosis (UHR)(M 10, F 11) and 19 normal controls (NC)(M 10, F 9) were recruited. The working memory was assessed by using the verbal and spatial n-back test. The working memory load increased incrementally from the 0-back to the 3-back condition. Results : SPR performed significantly lower than NC and UHR in terms of hit rates of verbal and spatial n-back test. UHR subjects conducted significantly lower than NC and higher in trend-level than SPR in terms of hit rates of verbal and spatial n-back test. These differences were derived from the high working memory load (2-back and 3-back), not from the low working memory load (0-back and 1-back). There was no significant difference between the verbal and spatial n-back test across the three groups. Conclusion : These findings suggest that verbal and spatial working memory dysfunction may be general rather than differential in terms of stimuli modality, and this working memory deficit may be an important trait factor in schizophrenia.

Vectorization of an Explicit Finite Element Method on Memory-to-Memory Type Vector Computer (Memory-to-Memory방식 벡터컴퓨터에서의 외연적 유한요소법의 벡터화)

  • 이지호;이재석
    • Computational Structural Engineering
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    • v.4 no.1
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    • pp.95-108
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    • 1991
  • An explicit finite element method can be executed more rapidly and effectively on vector computer than on the scalar computer because it has suitable structures for vector processing. In this paper, an efficient vectorization method of the explicit finite element program on the memory-to-memory type vector computer is proposed. First, the general vectorization method which can be applied regardless of the vector architecture is investigated, then the method which is suitable for the memory-to-memory type vector computer is proposed. To illustrate the usefulness of the proposed vectorization method, DYNA3D, the existing explicit finite element program, is migrated on HDS AS/XL V50 which is the memory-to-memory type vector computer. Performance results on actual test show a vector/scalar speedup is above 2.4.

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Development of Memory Controller for Punctuality Guarantee from Memory-Free Inspection Equipment using DDR2 SDRAM (DDR2 SDRAM을 이용한 비메모리 검사장비에서 정시성을 보장하기 위한 메모리 컨트롤러 개발)

  • Jeon, Min-Ho;Shin, Hyun-Jun;Jeong, Seung-Heui;Oh, Chang-Heon
    • Journal of Advanced Navigation Technology
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    • v.15 no.6
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    • pp.1104-1110
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    • 2011
  • The conventional semiconductor equipment has adopted SRAM module as the test pattern memory, which has a simple design and does not require refreshing. However, SRAM has its disadvantages as it takes up more space as its capacity becomes larger, making it difficult to meet the requirements of large memories and compact size. if DRAM is adopted as the semiconductor inspection equipment, it takes up less space and costs less than SRAM. However, DRAM is also disadvantageous because it requires the memory cell refresh, which is not suitable for the semiconductor examination equipments that require correct timing. Therefore, In this paper, we will proposed an algorithm for punctuality guarantee of memory-free inspection equipment using DDR2 SDRAM. And we will Developed memory controller using punctuality guarantee algorithm. As the results, show that when we adopt the DDR2 SDRAM, we can get the benefits of saving 13.5 times and 5.3 times in cost and space, respectively, compared to the SRAM.

Memory Controller Architecture with Adaptive Interconnection Delay Estimation for High Speed Memory (고속 메모리의 전송선 지연시간을 적응적으로 반영하는 메모리 제어기 구조)

  • Lee, Chanho;Koo, Kyochul
    • Journal of IKEEE
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    • v.17 no.2
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    • pp.168-175
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    • 2013
  • The delay times due to the propagating of data on PCB depend on the shape and length of interconnection lines when memory controllers and high speed memories are soldered on the PCB. The dependency on the placement and routing on the PCB requires redesign of I/O logic or reconfiguration of the memory controller after the delay time is measured if the controller is programmable. In this paper, we propose architecture of configuring logic for the delay time estimation by writing and reading test patterns while initializing the memories. The configuration logic writes test patterns to the memory and reads them by changing timing until the correct patterns are read. The timing information is stored and the configuration logic configures the memory controller at the end of initialization. The proposed method enables easy design of systems using PCB by solving the problem of the mismatching caused by the variation of placement and routing of components including memories and memory controllers. The proposed method can be applied to high speed SRAM, DRAM, and flash memory.

Experimental characterization of a smart material via DIC

  • Casciati, Sara;Bortoluzzi, Daniele;Faravelli, Lucia;Rosadini, Luca
    • Smart Structures and Systems
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    • v.30 no.3
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    • pp.255-261
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    • 2022
  • When no extensometer is available in a generic tensile-compression test carried out by a universal testing machine (for instance the model BIONIX from Material Testing Systems (MTS)), the test results only provide the relative displacement between the machine grips. The test does not provide any information on the local behaviour of the material. This contribution presents the potential of an application of Digital Image Correlation (DIC) toward the reconstruction of the behaviour along the specimen. In particular, the authors test a Ni-Ti shape memory alloys (SMA) specimen with emphasis on the coupling of the two measurement techniques.

Effect of Yukmijihwangtang on Learning and Memory Impairment in Transient Focal Cerebral Ischemia Rat Model (육미지황탕(六味地黃湯)이 국소뇌허혈유발 기억장애(記憶障碍) 모델 흰쥐에 미치는 영향)

  • Kim, Ki-Hyun;Min, Sang-Yeon;Kim, Jang-Hyun
    • The Journal of Korean Medicine
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    • v.30 no.2
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    • pp.1-16
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    • 2009
  • Objectives: This study investigated the effect of Yukmijihwangtang on cerebral ischemia-induced learning and memory impairment by middle cerebral artery (MCA) occlusion in rats. Methods: The ability of learning and memory of rats was measured using the eight-arm radial maze and the passive avoidance test, and profile of cholinergic neuron was assessed in the medial septum and hippocampus region by immuno-histochemistry. Results: 1. No differences were found between groups in the number of correct choices in acquisition performance during the eight-arm radial maze task. 2. No differences were found between groups on day 1 in the error rate in acquisition performance, which is defined as the number of enters into the same arm more than once within five minutes. After 5 to 6 days of test, the number of errors was significantly reduced in the Yukmijihwangtang group (forebrain ischemia group with Yukmijihwangtang treatment), compared with the ischemia group. 3. The memory processes significantly improved in the Yukmijihwangtang group according to results of the passive avoidance test. 4. The appearance of AchE (acetylcholinesterase) in the CA1 region of hippocampus significantly decreased in the ischemia group, compared with the sham group (untreated group). The appearance of AchE in the same region significantly increased in the Yukmijihwangtang group, compared with the ischemia group. 5. The appearance of ChAT (choline acetyltransferase) in the CA1 region of the hippocampus and medial septum decreased in the ischemia group, compared with the sham group. The appearance of ChAT in the same region significantly increased in the Yukmijihwangtang group, compared with the ischemia group Conclusions: This study provides evidence that Yukmijihwangtang is effective for reviving the ability of learning and memory and damaged neurons in rats with experimental cerebral ischemia.

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