• Title/Summary/Keyword: memory efficiency

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Efficient Metadata Management Scheme in NAND Flash based Storage Device (플래시 메모리기반 저장장치에서 효율적 메타데이터 관리 기법)

  • Kim, Dongwook;Kang, Sooyong
    • Journal of Digital Contents Society
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    • v.16 no.4
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    • pp.535-543
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    • 2015
  • Recently, NAND flash based storage devices are being used as a storage device in various fields through hiding the limitations of NAND flash memory and maximizing the advantages. In particular, those storage devices contain a software layer called Flash Translation Layer(FTL) to hide the "erase-before-write" characteristics of NAND flash memory. FTL includes the metadata for managing the data requested from host. That metadata is stored in internal memory because metadata is very frequently accessed data for processing the requests from host. Thus, if the power-loss occurs, all data in memory is lost. So metadata management scheme is necessary to store the metadata periodically and to load the metadata in the initialization step. Therefore we proposed the scheme which satisfies the core requirements for metadata management and efficient operation. And we verified the efficiency of proposed scheme by experiments.

Performance Evaluation and Analysis of NVMe SSD (Non-volatile Memory Express 인터페이스 기반 저장장치의 성능 평가 및 분석)

  • Son, Yongseok;Yeom, Heon Young;Han, Hyuck
    • KIISE Transactions on Computing Practices
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    • v.23 no.7
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    • pp.428-433
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    • 2017
  • Recently, the demand for high performance non-volatile memory storage devices that can replace existing hard disks has been increasing in environments requiring high performance computing such as data-centers and social network services. The performance of such non-volatile memory can greatly depend on the interface between the host and the storage device. With the evolution of storage interfaces, the non-volatile memory express (NVMe) interface has emerged, which can replace serial attached SCSI and serial ATA (SAS/SATA) interfaces based on existing hard disks. The NVMe interface has a higher level of scalability and provides lower latency than traditional interfaces. In this paper, an evaluation and analysis are conducted of the performance of NVMe storage devices through various workloads. We also compare and evaluate the cost efficiency of NVMe SSD and SATA SSD.

The effects of regular exercise on capsaicin-induced pulpal pain and pain-induced changes in passive avoidance learning and memory in rats

  • Raoof, Maryam;Shakoori, Afshin;Kooshki, Razieh;Abbasnejad, Mehdi;Amanpour, Sara
    • The Korean Journal of Pain
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    • v.30 no.4
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    • pp.258-264
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    • 2017
  • Background: Pulpal pain is one of the most common and severe orofacial pain conditions with considerable adverse effects on physiological processes including learning and memory. Regular exercise is known to be effective on cognitive function as well as pain processing in the central nervous system. Here, the possible effects of regular exercise on pulpal pain response as well as pain-induced changes in learning and memory efficiency in rats were investigated. Methods: Twenty-four male Wistar rats were randomly assigned to the control, capsaicin, exercise, and exercise plus capsaicin groups. Rats in exercise groups were forced to run on a treadmill with a moderate exercise protocol for 4 weeks. Capsaicin was used to induce dental pulp pain. Passive avoidance learning and memory performance was assessed by using a shuttle box apparatus. Results: According to the results, regular exercise could decrease the time course of capsaicin-induced pulpal pain (P < 0.001). Moreover, in capsaicin-treated rats, passive avoidance acquisition was impaired as compared to the control (P < 0.05) and exercise (P < 0.001) groups. Additionally, regular exercise before capsaicin injection could attenuate capsaicin-induced memory impairments (P < 0.05). Conclusions: Taken together, the present data showed that regular exercise has inhibitory effects on capsaicin-induced pulpal pain as well as pain-induced cognitive dysfunction in rats.

New Flash Memory Management Method for Reliable Flash Storage Systems (신뢰성 있는 플래시메모리 저장시스템 구축을 위한 플래시메모리 저장 공간 관리 방법)

  • Kim, Han-Joon;Lee, Sang-Goo
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.6
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    • pp.567-582
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    • 2000
  • We propose a new way of managing flash memory space for flash memory-specific file system based on log-structured file system. Flash memory has attractive features such as non-volatility, and fast I/O speed, but it also suffers from inability to update in place and limited usage cycles. These drawbacks require many changes to conventional storage (file) management techniques. Our focus is on lowering cleaning cost and evenly utilizing flash memory cells while maintaining a balance between the two often-conflicting goals. The proposed cleaning method performs well especially when storage utilization and the degree of locality are high. The cleaning efficiency is enhanced by dynamically separating cold data and non-cold data. The second goal, cycle-leveling is achieved to the degree where the maximum difference between erase cycles is below the error range of the hardware. Simulation results show that the proposed method has significant benefit over naxve methods: maximum of 35% reduction in cleaning cost with even spreading writes across segments.

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Efficient Processing of Grouped Aggregation on Non-Uniformed Memory Access Architecture (비균등 메모리 접근 구조에서의 효율적인 그룹화 집단 연산의 처리)

  • Choe, Seongjun;Min, Jun-Ki
    • Database Research
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    • v.34 no.3
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    • pp.14-27
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    • 2018
  • Recently, to alleviate the memory bottleneck problme occurred in Symmetric Multiprocessing (SMP) architecture, Non-Uniform Memory Access (NUMA) architecture was proposed. In addition, since an aggregation operator is an important operator providing properties and summary of data, the efficiency of the aggregation operator is crucial to overall performance of a system. Thus, in this paper, we propose an efficient aggregation processing technique on NUMA architecture. Our proposed technique consists of partition phase and merge phase. In the partition phase, the target relation is partitioned into several partial relations according to grouping attribute. Thus, since each thread can process aggregation operator on partial relation independently, we prevent the remote memory access during the merge phase. Furthermore, at the merge phase, we improve the performance of the aggregation processing by letting each thread compute aggregation with a local hash table as well as avoiding lock contention to merge aggregation results generated by all threads into one.

Effects of Brain Spinning Program on Cognitive Function, Body Composition, and Health Related Fitness of Children and Adolescents (브레인스피닝 프로그램이 소아청소년의 인지기능, 신체조성, 건강관련체력에 미치는 영향)

  • Jun-Hyeok Kim;Wook Song;In-Soo Song;Hyun-Jun Kim;Byung-Gul Lim;Jung-Yoon Hur
    • Journal of The Korean Society of Integrative Medicine
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    • v.12 no.1
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    • pp.83-96
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    • 2024
  • Purpose : This study was conducted to determine the effects of a brain spinning program on cognitive function, body composition, health related fitness and physical self-efficacy of children and adolescents. Methods : This study, 34 children and adolescents were selected and divided into two groups : the exercise group (n=16), which received a brain spinning program and the control group (n=16), which did not receive any exercise program. The program was conducted for 30 minutes three times a week for 4 weeks, and the cognitive function, body composition, health related fitness and physical self-efficacy were measured both before and after the program. Results : The exercise group, which received a brain spinning program showed a significant increase in short-term memory (p<.05) and working memory (p<.01), and muscle mass increased significantly only in the exercise group (p<.05). In addition, left grip strength increased in the exercise group (p<.01), and the maximum oxygen intake decreased significantly only in the control group (p<.05), and Sit-forward bend increased significantly only in the exercise group (p<.01). Physical self-efficacy significantly increased only in the exercise group (p<.05). Conclusion : In summary, short-term memory, cognitive efficiency, working memory, muscle mass, left grip strength, maximum oxygen intake, and left forward bending in children and adolescents significantly increased after the 4-week brain spinning program. However, the control group that was not provided with the 4-week brain spinning program showed a significant increase in body weight and a significant decrease in maximum oxygen intake. In conclusion, the 4-week brain spinning program has positive effects on short-term memory, cognitive function, muscle mass, muscle strength, cardiorespiratory endurance, flexibility, and physical self-efficacy.

1-Pass Semi-Dynamic Network Decoding Using a Subnetwork-Based Representation for Large Vocabulary Continuous Speech Recognition (대어휘 연속음성인식을 위한 서브네트워크 기반의 1-패스 세미다이나믹 네트워크 디코딩)

  • Chung Minhwa;Ahn Dong-Hoon
    • MALSORI
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    • no.50
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    • pp.51-69
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    • 2004
  • In this paper, we present a one-pass semi-dynamic network decoding framework that inherits both advantages of fast decoding speed from static network decoders and memory efficiency from dynamic network decoders. Our method is based on the novel language model network representation that is essentially of finite state machine (FSM). The static network derived from the language model network [1][2] is partitioned into smaller subnetworks which are static by nature or self-structured. The whole network is dynamically managed so that those subnetworks required for decoding are cached in memory. The network is near-minimized by applying the tail-sharing algorithm. Our decoder is evaluated on the 25k-word Korean broadcast news transcription task. In case of the search network itself, the network is reduced by 73.4% from the tail-sharing algorithm. Compared with the equivalent static network decoder, the semi-dynamic network decoder has increased at most 6% in decoding time while it can be flexibly adapted to the various memory configurations, giving the minimal usage of 37.6% of the complete network size.

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Effects of Protease Treatment and Animal Behavior on the Dissociative Culture of Aplysia Neurons

  • Lee, Nuribalhae;Rim, Young-Soo;Kaang, Bong-Kiun
    • Animal cells and systems
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    • v.13 no.3
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    • pp.267-274
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    • 2009
  • The dissociative culture technique of Aplysia neuron is one of the key methods that have been used for studies of cellular and molecular mechanisms of neuronal functioning. However, despite the advantages this method offers as an experimental model, its technical efficiency has had room for improvement. In this study, we examined certain putative factors that might affect the culture quality. The effects of neuronal damage induced by physical injuries, heat shock, and surface protein degradation were evaluated along with the correlation between the culture quality and animal behavior. As a result, we found that physical injury can be a critical factor that affects culture quality, whereas the heat shock and surface protein degradation had negligible effect on it. In addition, we discovered that siphon retraction time was not a good measurement for healthy neurons. Based on these findings, we suggest here an improved method in which the degree of physical injury is reduced by means of multiple protease treatment.

High Security FeRAM-Based EPC C1G2 UHF (860 MHz-960 MHz) Passive RFID Tag Chip

  • Kang, Hee-Bok;Hong, Suk-Kyoung;Song, Yong-Wook;Sung, Man-Young;Choi, Bok-Gil;Chung, Jin-Yong;Lee, Jong-Wook
    • ETRI Journal
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    • v.30 no.6
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    • pp.826-832
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    • 2008
  • The metal-ferroelectric-metal (MFM) capacitor in the ferroelectric random access memory (FeRAM) embedded RFID chip is used in both the memory cell region and the peripheral analog and digital circuit area for capacitance parameter control. The capacitance value of the MFM capacitor is about 30 times larger than that of conventional capacitors, such as the poly-insulator-poly (PIP) capacitor and the metal-insulator-metal (MIM) capacitor. An MFM capacitor directly stacked over the analog and memory circuit region can share the layout area with the circuit region; thus, the chip size can be reduced by about 60%. The energy transformation efficiency using the MFM scheme is higher than that of the PIP scheme in RFID chips. The radio frequency operational signal properties using circuits with MFM capacitors are almost the same as or better than with PIP, MIM, and MOS capacitors. For the default value specification requirement, the default set cell is designed with an additional dummy cell.

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Formal Verification of RACE Protocol Using VIS (VIS를 이용한 RACE 포로토콜의 정형검증)

  • Um, Hyun-Sun;Choi, JIn-Young;Han, Woo-Jong;Ki, An-Do;Shim, Kyu-Hyun
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.7
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    • pp.2219-2228
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    • 2000
  • Caches in a multiprocessing environment introduce the cache coherence problem. When multiple processors maintain locally cached copies of a unique shared-memory location, any local modification of the location can result in a globally inconsistent view of memory. Cache coherence protocols are important to operate a shared-memory multiprocessor system with efficiency and correctness. Since random testing and simulations are not enough to validate correctness of protocols, it is necessary to develop efficient and reliable verification methods. In this appear we present our experience in using VIS (Verification Interacting with Synthesis), a tool of formal method, to analyze a number of property of a cache coherence protocol, RACE (Remote Access Cache coherent Enforcement).

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