• Title/Summary/Keyword: low-resolution encoder

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A Study on the Feed Characteristics of Twist Friction Driver (Twist Friction Driver의 이송특성에 관한 연구)

  • Jeong, Jun-Hui;Lee, Eung-Suk;An, Dong-Yul
    • Proceedings of the KSME Conference
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    • 2004.11a
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    • pp.934-939
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    • 2004
  • This paper propose a study on the Feed Characteristics of Twist Friction Driver. We are using Twist Friction Driving mechanism system. The system consists of Twist Friction Driver elements such as driving shaft, driven roller, Spring for pre-load, Air bearing guide, Servo motor, and measuring devices such as Encoder of Servo motor, Laser interferometer, LVDT . The Twist Friction driver is mechanically simple and very quiet at high speed, and has low pre-load. So The Twist Friction driver can materialize an ultra precision feed-resolution. The feed characteristics of the driver is determined by slip and angular error, backlash.

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A Novel Measuring Method of In-plane Position of Contact-Free Planar Actuator Using Binary Grid Pattern Image (이진 격자 패턴 이미지를 이용한 비접촉식 평면 구동기의 면내 위치(x, y, $\theta$) 측정 방법)

  • 정광석;정광호;백윤수
    • Journal of the Korean Society for Precision Engineering
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    • v.20 no.7
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    • pp.120-127
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    • 2003
  • A novel three degrees of freedom sensing method utilizing binary grid pattern image and vision camera is presented. The binary grid pattern image is designed by Pseudo-Random Binary Arrays and referenced to encode in-plane position of a moving stage of the contact-free planar actuator. First, the yaw motion of the stage is detected using fast image processing and then the other planar positions, x and y, are decoded with a sequence of images. This method can be applied to the system that needs feedback of in-plane position, with advantages of a good accuracy and high resolution comparable with the encoder, a relatively compact structure, no friction, and a low cost. In this paper, all the procedures of the above sensing mechanism are described in detail, including simulation and experiment results.

Microprocessor - based Self - controllers for the drive of Permanent Magnet Synchronous Motors - (마이크로 프로세서에 의한 영구자석 동기 전동기의 자기제어기(自己制御器) 설계 및 구동)

  • Yoon, Byung-Do;Kim, Yoon-Ho;Lee, Young-Suk;Kim, Eel-Hwan
    • Proceedings of the KIEE Conference
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    • 1989.11a
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    • pp.283-287
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    • 1989
  • This paper presents a microprocesser based Self-Controller for a Permanent Magnet Synchronous Motor(PMSM), fed by voltage soure inverter. The proper operation of the PMSM can be ensured only if the stator current is always synchronized with the its Back-E.M.F. The use of incremantal encoder with high resolution makes it possible to design a Self-Control led P.W.M. inverter. The pulse ratios are controlled to reduce the torque ripple in the low-speed drive region. And during the operation, torque - speed characteristics are improved by the control of optimal load angle.

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Precise Speed Control of Brushless DC Motors using Hall sensor (홀센서를 이용한 BLDC모터의 정밀한 속도 제어)

  • Kim, Kwang-Young;Shin, Doo-Jin;Yu, Byung-Sam;Huh, Uk-Youl;Lee, Je-Hee
    • Proceedings of the KIEE Conference
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    • 1999.07b
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    • pp.573-575
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    • 1999
  • Brushless DC motor which has the characteristics of high efficiency and high torque, can be controlled speed by the encoder or resolver. But these sensors cost highly and have the problem that they increases the size. This paper proposes a speed control by Hall-Sensor. which is small and cheap. But this sensor has a problem of low resolution. To solve the problem this paper proposes speed control by using a least square algorithm.

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Application of watermarking to error concealment in video communications (영상통신에서의 패킷 오류 은닉에 활용되는 워터마킹 기법)

  • Oh, Tae-Suk;Kim, Yong-Cheol
    • Proceedings of the KIEE Conference
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    • 2006.04a
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    • pp.84-86
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    • 2006
  • An informed watermarking algorithm is proposed in this work that aids in concealing packet loss errors in video communications. This watermark-based error concealment(WEC) method embeds a low resolution version of the video frame inside itself as watermark data. At the receiver, the extracted watermark is used as a reference for error concealment. The proposed DCT-based algorithm has features of informed watermarking in order to minimize the distortion of the host frame. At the encoder, a predictive feedback loop Is employed which helps to adjusts the strength of the scale factor Furthermore, some of the modified coefficients of the DCT signal are virtually free from distortion by employing bit- sign adaptivity. The performance of the detector is Qualitatively analyzed for error concealment applications where full-frame DCT embedding proved to be more advantageous.

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Position Estimator Employing Kalman Filter for PM Motors Driven with Binary-type Hall Sensors

  • Lee, Dong-Myung
    • Journal of Electrical Engineering and Technology
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    • v.11 no.4
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    • pp.931-938
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    • 2016
  • Application of vector control scheme for consumer products is enlarging to improve control performance. For the field-oriented control, accurate position detection is essential and generally requires expensive sensors. On the other hand, cost-reduction is important in home appliances, so that binary-type Hall-effect sensors are commonly used rather than using an expensive sensor such as an encoder. The control performance is directly influenced by the accuracy of the position information, and there exist non-uniformities related to Hall sensors in electrical and mechanical aspects, which result in distorted position information. Therefore, to get high-precision position information from low-resolution Hall sensors, this paper proposes a new position estimator consisting of a Kalman filter and feedforward compensation scheme, which generates a linearly changing position signal. The efficacy of the proposed scheme is verified by simulation and experimental results carried out with a 48-pole permanent magnet motor.

Subjective Video Quality Evaluation of H.265/HEVC Encoded Low Resolution Videos for Ultra-Low Band Transmission System (초협대역 전송 시스템상에서 H.265/HEVC 부호화 저해상도 비디오에 대한 주관적 화질 평가)

  • Uddina, A.F.M. Shahab;Monira, Mst. Sirazam;Chung, TaeChoong;Kim, Donghyun;Choi, Jeung Won;Jun, Ki Nam;Bae, Sung-Ho
    • Journal of Broadcast Engineering
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    • v.24 no.6
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    • pp.1085-1095
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    • 2019
  • In this paper, we perform a subjective quality assessment on low-resolution surveillance videos, which are encoded with a very low target bit-rate to use in an ultra-low band transmission system and investigate the encoding effects on the perceived video quality. The test videos are collected based on their spatial and temporal characteristics which affect the perceived quality. H.265/HEVC encoder is used to prepare the impaired sequences for three target bit-rates 20, 45, and 65 kbps and subjective quality assessment is conducted to evaluate the quality from a viewing distance of 3H. The experimental results show that the quality of encoded videos, even at target bit-rate of 45 kbps can satisfy the users. Also we compare objective image/video quality assessment methods on the proposed dataset to measure their correlation with subjective scores. The experimental results show that the existing methods poorly performed, that indicates the need for a better quality assessment method.

Watermarking-based Error Concealment in Video Communications

  • Oh Tae-Suk;Kim Yong-Cheol;Adsumilli Chowdary;Mitra Sanjit
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.7C
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    • pp.700-705
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    • 2006
  • In this paper, an informed watermarking algorithm is proposed that aids in concealing packet loss errors in video communications. This watermark-based error concealment (WEC) method embeds a low resolution version of the video frame inside itself as watermark data. At the receiver, the extracted watermark is used as a reference for error concealment. The proposed DCT-based algorithm employs informed watermarking techniques in order to minimize the distortion of host frames. At the encoder, a predictive feedback loop is employed which helps to adjust the strength of the data embedding. Furthermore, the distortion of the DCT coefficients introduced in the embedding can be removed to a considerable extent, by employing bit-sign adaptivity. Simulation results on standard video sequences show that the proposed informed WEC scheme has an advantage of 3$\sim$4 dB in PSNR over non-informed WEC and that even a non-informed WEC is still superior to conventional error concealment techniques.

A Deep Neural Network Architecture for Real-Time Semantic Segmentation on Embedded Board (임베디드 보드에서 실시간 의미론적 분할을 위한 심층 신경망 구조)

  • Lee, Junyeop;Lee, Youngwan
    • Journal of KIISE
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    • v.45 no.1
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    • pp.94-98
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    • 2018
  • We propose Wide Inception ResNet (WIR Net) an optimized neural network architecture as a real-time semantic segmentation method for autonomous driving. The neural network architecture consists of an encoder that extracts features by applying a residual connection and inception module, and a decoder that increases the resolution by using transposed convolution and a low layer feature map. We also improved the performance by applying an ELU activation function and optimized the neural network by reducing the number of layers and increasing the number of filters. The performance evaluations used an NVIDIA Geforce GTX 1080 and TX1 boards to assess the class and category IoU for cityscapes data in the driving environment. The experimental results show that the accuracy of class IoU 53.4, category IoU 81.8 and the execution speed of $640{\times}360$, $720{\times}480$ resolution image processing 17.8fps and 13.0fps on TX1 board.

Hardware Implementation of Past Multi-resolution Motion Estimator for MPEG-4 AVC (MPEG-4 AVC를 위한 고속 다해상도 움직임 추정기의 하드웨어 구현)

  • Lim Young-hun;Jeong Yong-jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.11C
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    • pp.1541-1550
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    • 2004
  • In this paper, we propose an advanced hardware architecture for fast multi-resolution motion estimation of the video coding standard MPEG-1,2 and MPEG-4 AVC. We describe the algorithm and derive hardware architecture emphasizing the importance of area for low cost and fast operation by using the shared memory, the special ram architecture, the motion vector for 4 pixel x 4 pixel, the spiral search and so on. The proposed architecture has been verified by ARM-interfaced emulation board using Excalibur Altera FPGA and also by ASIC synthesis using Samsung 0.18 m CMOS cell library. The ASIC synthesis result shows that the proposed hardware can operate at 140 MHz, processing more than 1,100 QCIF video frames or 70 4CIF video frames per second. The hardware is going to be used as a core module when implementing a complete MPEG-4 AVC video encoder ASIC for real-time multimedia application.