• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.241-244
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• 2003

Nowadays image processing is very useful for some field of traffic applications. The one reason is we can construct the system in a low price, the other is the improvement of hardware processing power, it can be more fast to processing the data. In this study, I propose the traffic monitoring system that implement on the embedded system environment. The whole system consists of two main part, one is host controller board, the other is image processing board. The part of host controller board take charge of control the total system, interface of external environment. and OSD(On screen display). The part of image processing board takes charge of image input and output using video encoder and decoder, image classification and memory control of using FPGA, control of mouse signal. And finally, fer stable operation of host controller board, uC/OS-II operating system is ported on the board.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.535-537
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• 2004

The flame image processing and it's analysis system has been developed for optimal coal firing of thermal power plant, especially for reducing NOx and safe operations. We aimed at gaining the relationship between burner flame image, emissions of NOx and LOI(Loss on ignition) in furnace by utilizing the flame image processing methods. And the relationship determines quantitatively the conditions of combustion on the individual burners. The test was conducted on Samchonpo thermal power plant #4 unit(560MW) of KOSEP which has 24 burners. The system simplified the burner adjustment works in accordance with the real time trending of flame behavior like NOx profiles and unburned carbon profiles for individual burners. But, This kind of conventional method increases the cost as the number of burner are increased. Also there is a difficulty to measure exhausted gas of each burner because of measurement errors. This paper intends to propose the useful "Flame Monitoring System" that can find Low NOX and LOI at the upper furnace and to compare with the conventional System.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.999-1002
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• 2013

There are numerous image processing systems these are usually depend on high performance processors. However, systems using high performance processors might not be proper to mobile applications or low-power systems. Therefore, more efficient methodology for image processing is required for variable applications. This paper proposed pre-processing method using intra prediction concept in order to reduce processing range in a image picture(frame) and entire processing time. Also, the system configuration based on intra prediction hardware core and implementation result of the hardware core are presented in this paper.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.11
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• pp.1577-1585
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• 2022

As the interest in the 4th industrial revolution and metaverse increases, metaverse with multi edge structure is proposed and noted. Metaverse is a structure that can create digital doctor-like system through a large amount of image processing and data transmission in a multi edge system. Since metaverse application requires calculating performance, which can reconstruct 3-D space, edge hardware's insufficient calculating performance has been a problem. To provide streamable AI software in runtime, image processing, and data transmission, which is edge's loads, needs to be lightweight. Also lightweight at the edge leads to power consumption reduction of the entire metaverse application system. In this paper, we propose collaborative edge-cloud image processing with remote image processing method and Region of Interest (ROI) to overcome edge's power performance and build streamable and runtime executable AI software. The proposed structure was implemented using a PC and an embedded board, and the reduction of time, power, and network communications were verified.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.585-593
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• 2017

In this paper, we propose a deblocking filter hardware architecture for low-power HEVC (High-Efficiency Video Coding) in-loop for mobile systems. HEVC performs image compression on a block-by-block basis, resulting in blockage of the image due to quantization error. The deblocking filter is used to remove the blocking phenomenon in the image. Currently, UHD video service is supported in various mobile systems, but power consumption is high. The proposed low-power deblocking filter hardware structure minimizes the power consumption by blocking the clock to the internal module when the filter is not applied. It also has four parallel filter structures for high throughput at low operating frequencies and each filter is implemented in a four-stage pipeline. The proposed deblocking filter hardware structure is designed with Verilog HDL and synthesized using TSMC 65nm CMOS standard cell library, resulting in about 52.13K gates. In addition, real-time processing of 8K@84fps video is possible at 110MHz operating frequency, and operation power is 6.7mW.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.1105-1108
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• 1999

In this paper, we propose a new addressing mode, which can be used for programmable image processor to perform image- processing algorithms effectively. Conventional addressing modes are suitable for one-dimensional data processing such as voice, but the proposed addressing mode consider two-dimensional characteristics of image data. The proposed instruction for two-dimensional addressing requires two operands to specify a pixel and doesn't require any change of memory architecture. Combining several instructions to load a pixel-data from an external memory to a register, the proposed instruction reduces code size so that satisfy hish performance and low power requirements of image processor. In addition, it uses inherent two-dimensional characteristics of image data and offers user-friendly instruction to assembler programmer.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.3
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• pp.179-185
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• 2019

This paper proposes a block-type classification based image binarization for the implementation of the low-power feature extraction algorithm. The proposed method can be implemented with threshold value re-use technique approach when the image divided into $64{\times}64$ macro blocks size and calculating the threshold value for each block type only once. The algorithm is validated based on quantitative results that only a threshold value change rate of up to 9% occurs within the same image/block type. Existing algorithms should compute the threshold value for 64 blocks when the macro block is divided by $64{\times}64$ on the basis of $512{\times}512$ images, but all suggestions can be made only once for best cases where the same block type is printed, and for the remaining 63 blocks, the adaptive threshold calculation can be reduced by only performing a block type classification process. The threshold calculation operation is performed five times when all block types occur, and only the block type separation process can be performed for the remaining 59 blocks, so 93% adaptive threshold calculation operation can be reduced.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.2
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• pp.97-103
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• 2017

Thermal imaging is mainly used in military equipment required for night observation. In particular, technologies of uncooled thermal imaging detectors are being developed as applied to low-cost night observation system. Many system integrators require different specifications of the uncooled thermal imaging camera but their development time is short. In this approach, EOSYSTEM has developed a small size, TEC-less uncooled thermal imaging camera module with $32{\times}32mm$ size and low power consumption. Both domestic detector and import detector are applied to the EOSYSTEM's thermal imaging camera module. The camera module contains efficient infrared image processing algorithms including : Temperature compensation non-uniformity correction, Bad/Dead pixel replacement, Column noise removal, Contrast/Edge enhancement algorithms providing stable and low residual non-uniformity infrared image.

• Korean Journal of Remote Sensing
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• v.4 no.1
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• pp.31-40
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• 1988

Low-cost microcomputer systems can be assembled which possess computing power, color display, memory, and storage capacity approximately equal to graphic workstactions. A low-cost, flexible, and user-friendly IBM/PC/XT/AT based image processing system has been developed and named as KMIPS(KAIST (Korea Advanced Institute of Science & Technology) Map and Image Processing Station). It can be easily utilized by the resource managers who are not computer specialists. This system can: * directly access Landsat MSS and TM, SPOT, NOAA AVHRR, MOS-1 satellite imagery and other imagery from different sources via magnetic tape drive connected with IBM/PC; * extract image up to 1024 line by 1024 column and display it up to 480 line by 672 column with 512 colors simultaneously available; * digitize photographs using a frame grabber subsystem(512 by 512 picture elements); * perform a variety of image analyses, GIS and terrain analyses, and display functions; and * generate map and hard copies to the various scales. All raster data input to the microcomputer system is geographically referenced to the topographic map series in any rater cell size selected by the user. This map oriented, georeferenced approach of this system enables user to create a very accurately registered(.+-.1 picture element), multivariable, multitemporal data sets which can be subsequently subsequently subjected to various analyses and display functions.

• Journal of Information Processing Systems
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• v.18 no.1
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• pp.59-74
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• 2022

During the last decade, the security of digital images has received considerable attention in various multimedia transmission schemes. However, many current cryptosystems tend to adopt a single-layer permutation or diffusion algorithm, resulting in inadequate security. A hierarchical bilateral diffusion architecture for color image encryption is proposed in response to this issue, based on a hyperchaotic system and DNA sequence operation. Primarily, two hyperchaotic systems are adopted and combined with cipher matrixes generation algorithm to overcome exhaustive attacks. Further, the proposed architecture involves designing pixelpermutation, pixel-diffusion, and DNA (deoxyribonucleic acid) based block-diffusion algorithm, considering system security and transmission efficiency. The pixel-permutation aims to reduce the correlation of adjacent pixels and provide excellent initial conditions for subsequent diffusion procedures, while the diffusion architecture confuses the image matrix in a bilateral direction with ultra-low power consumption. The proposed system achieves preferable number of pixel change rate (NPCR) and unified average changing intensity (UACI) of 99.61% and 33.46%, and a lower encryption time of 3.30 seconds, which performs better than some current image encryption algorithms. The simulated results and security analysis demonstrate that the proposed mechanism can resist various potential attacks with comparatively low computational time consumption.