• Title/Summary/Keyword: low-complexity design

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Hardware Design of SNR Estimator for Adaptive Satellite Transmission System (적응형 위성 전송 시스템을 위한 신호 대 잡음비 추정 회로 구현)

  • Lee, Jae-Ung;Kim, Soo-Seong;Park, Eun-Woo;Im, Chae-Yong;Yeo, Sung-Moon;Kim, Soo-Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.2A
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    • pp.148-158
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    • 2008
  • This paper proposes an efficient signal to noise ratio (SNR) estimation algorithm and its hardware implementation for adaptive transmission system using M-ary modulation scheme. In this paper, we present the implementation results of the proposed algorithm for the second generation digital video broadcasting via satellite (DVB-S2) system, and the proposed algorithm can be tailored to the other communication systems using adaptive transmissions. We built a look-up table (LUT) using the theoretical background of the received signal distribution, and by using this LUT we need just two comparators and a counter for the hardware implementation. For this reason, the hardware of the proposed scheme produces accurate estimation results even with extremely low complexity. The simulation results investigated in this paper reveal that the proposed method can produce estimation results within the specified SNR range in the DVB-S2 system, and it requires a few hundreds of samples for average estimation error of about 1 dB.

Fast Frame Selection Method for Multi-Reference and Variable Block Motion Estimation (다중참조 및 가변블록 움직임 추정을 위한 고속 참조영상 선택 방법)

  • Kim, Sung-Dae;SunWoo, Myung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.45 no.6
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    • pp.1-8
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    • 2008
  • This paper introduces three efficient frame selection schemes to reduce the computation complexity for the multi-reference and variable block size Motion Estimation (ME). The proposed RSP (Reference Selection Pass) scheme can minimize the overhead of frame selection. The MFS (Modified Frame Selection) scheme can reduce the number of search points about 18% compared with existing schemes considering the motion of image during the reference frame selection process. In addition, the TPRFS (Two Pass Reference frame Selection) scheme can minimize the frame selection operation for the variable block size ME in H.264/AVC using the character of selected reference frame according to the block size. The simulation results show the proposed schemes can save up to 50% of the ME computation without degradation of image Qualify. Because the proposed schemes can be separated from the block matching process, they can be used with any existing single reference fast search algorithms.

A Study on App Factory Design for Improving App Development Software Productivity (앱 개발 소프트웨어 생산성 향상을 위한 개발 자동화 설계에 대한 연구)

  • Chang, Younghyun
    • The Journal of the Convergence on Culture Technology
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    • v.3 no.1
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    • pp.35-41
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    • 2017
  • Smart phone based IT support programs are faced with difficulties due to the following reasons first, long development period is required as separate developments are necessary respectively depending on the operating system of Smart phone second, it is also difficult to secure high development cost for the outsourcing of the development. It is a big problem for improving app developing productivity. Smart App Factory which is suggested in this thesis is the business strategy to surpass the Android market of Google and App Store of Apple within short period of time based on App productivity of Smart App Authoring Tool and to accomplish the materialization of App market which is in the 1st global position and all potential customers who need programs for their works regardless of budget, scope, complexity and scale will be implemented by unfolding unprecedented low price policy and global online marketing activities for App development.

Research on Digital Complex-Correlator of Synthetic Aperture Radiometer: theory and simulation result

  • Jingye, Yan;Ji, Wu;Yunhua, Zhang;Jiang, Changhong;Tao, Wang;Jianhua, Ren;Jingshan, Jiang
    • Proceedings of the KSRS Conference
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    • 2002.10a
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    • pp.587-592
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    • 2002
  • A new digital correlator fur an airborne synthetic aperture radiometer was designed in order to replace the conventional analog correlator unit which will become very complicated while the number of channels is increasing. The digital correlator uses digital IQ demodulator instead of the intermediate frequency (IF) phase shifter to make the correlation processing performed digitally at base band instead of analogly at IF. This technique has been applied to the digital receiver in softradio. The down-converted IF signals from each pair of receiver channels become low rate base-band digital signals after under-sampled, Digitally Down-Converted (DDC), decimated and filtered by FIR filters. The digital signals are further processed by two digital multipliers (complex correlation), the products are integrated by the integrators and finally the outputs from the integrators compose of the real part and the imaginary part of a sample of the visibility function. This design is tested by comparing the results from digital correlators and that from analog correlators. They are agreed with each other very well. Due to the fact that the digital correlators are realized with the help of Analog-Digital Converter (ADC) chips and the FPGA technology, the realized volume, mass, power consumption and complexity turned out to be greatly reduced compared with that of the analog correlators. Simulations show that the resolution of ADC has an influence on the synthesized antenna patterns, but this can be neglected if more than 2bit is used.

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Design and Implementation of Hand Gesture Recognizer Based on Artificial Neural Network (인공신경망 기반 손동작 인식기의 설계 및 구현)

  • Kim, Minwoo;Jeong, Woojae;Cho, Jaechan;Jung, Yunho
    • Journal of Advanced Navigation Technology
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    • v.22 no.6
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    • pp.675-680
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    • 2018
  • In this paper, we propose a hand gesture recognizer using restricted coulomb energy (RCE) neural network, and present hardware implementation results for real-time learning and recognition. Since RCE-NN has a flexible network architecture and real-time learning process with low complexity, it is suitable for hand recognition applications. The 3D number dataset was created using an FPGA-based test platform and the designed hand gesture recognizer showed 98.8% recognition accuracy for the 3D number dataset. The proposed hand gesture recognizer is implemented in Intel-Altera cyclone IV FPGA and confirmed that it can be implemented with 26,702 logic elements and 258Kbit memory. In addition, real-time learning and recognition verification were performed at an operating frequency of 70MHz.

Video Quality Assessment Based on Short-Term Memory

  • Fang, Ying;Chen, Weiling;Zhao, Tiesong;Xu, Yiwen;Chen, Jing
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.7
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    • pp.2513-2530
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    • 2021
  • With the fast development of information and communication technologies, video streaming services and applications are increasing rapidly. However, the network condition is volatile. In order to provide users with better quality of service, it is necessary to develop an accurate and low-complexity model for Quality of Experience (QoE) prediction of time-varying video. Memory effects refer to the psychological influence factor of historical experience, which can be taken into account to improve the accuracy of QoE evaluation. In this paper, we design subjective experiments to explore the impact of Short-Term Memory (STM) on QoE. The experimental results show that the user's real-time QoE is influenced by the duration of previous viewing experience and the expectations generated by STM. Furthermore, we propose analytical models to determine the relationship between intrinsic video quality, expectation and real-time QoE. The proposed models have better performance for real-time QoE prediction when the video is transmitted in a fluctuate network. The models are capable of providing more accurate guidance for improving the quality of video streaming services.

FPGA integrated IEEE 802.15.4 ZigBee wireless sensor nodes performance for industrial plant monitoring and automation

  • Ompal, Ompal;Mishra, Vishnu Mohan;Kumar, Adesh
    • Nuclear Engineering and Technology
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    • v.54 no.7
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    • pp.2444-2452
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    • 2022
  • The field-programmable gate array (FPGA) is gaining popularity in industrial automation such as nuclear power plant instrumentation and control (I&C) systems due to the benefits of having non-existence of operating system, minimum software errors, and minimum common reason failures. Separate functions can be processed individually and in parallel on the same integrated circuit using FPGAs in comparison to the conventional microprocessor-based systems used in any plant operations. The use of FPGAs offers the potential to minimize complexity and the accompanying difficulty of securing regulatory approval, as well as provide superior protection against obsolescence. Wireless sensor networks (WSNs) are a new technology for acquiring and processing plant data wirelessly in which sensor nodes are configured for real-time signal processing, data acquisition, and monitoring. ZigBee (IEEE 802.15.4) is an open worldwide standard for minimum power, low-cost machine-to-machine (M2M), and internet of things (IoT) enabled wireless network communication. It is always a challenge to follow the specific topology when different Zigbee nodes are placed in a large network such as a plant. The research article focuses on the hardware chip design of different topological structures supported by ZigBee that can be used for monitoring and controlling the different operations of the plant and evaluates the performance in Vitex-5 FPGA hardware. The research work presents a strategy for configuring FPGA with ZigBee sensor nodes when communicating in a large area such as an industrial plant for real-time monitoring.

Operation Model Design of Logistics Industrial estate -Focused on Transportation Network- (물류산업단지의 운영모델 설계 - 운송 네트워크를 중심으로-)

  • Shin, Jae Young;Kim, Woong-Sub
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2013.06a
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    • pp.214-215
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    • 2013
  • Current competition among companies than regional, the time constraints, it is globalization, Tilt the efforts of many to be operated by building the efficient distribution system to reduce logistics costs and improve customer service it is reality's there. Therefore, the need for industrial complexes environmentally friendly can be cost competitive companies perform cavitation region's increased. To build the distribution center these logistics system through a joint of freight and appropriate policy is required. In particular, efficient operation through the system construction of industrial complexes in the logistics system is very important in terms of friendly low-cost urban logistics, the environment. Since the traffic volume which is Jipufa and utilization of network is transported by a more appropriate technicians and means suitable operating model can efficiency is improved. However, despite these advantages, research network design has not been actively conducted due to the complexity of the problem. Therefore, in this study, by analyzing the logistics system, and presents the operating model through a simulation and basic settings for the model of the logistics complex based on the analysis result, the construction of infrastructure of logistics industry complex it is intended to present the article.

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A Design of DLL-based Low-Power CDR for 2nd-Generation AiPi+ Application (2세대 AiPi+ 용 DLL 기반 저전력 클록-데이터 복원 회로의 설계)

  • Park, Joon-Sung;Park, Hyung-Gu;Kim, Seong-Geun;Pu, Young-Gun;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.4
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    • pp.39-50
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    • 2011
  • In this paper, we presents a CDR circuit for $2^{nd}$-generation AiPi+, one of the Intra-panel Interface. The speed of the proposed clock and data recovery is increased to 1.25 Gbps compared with that of AiPi+. The DLL-based CDR architecture is used to generate the multi-phase clocks. We propose the simple scheme for frequency detector (FD) to mitigate the harmonic-locking and reduce the complexity. In addition, the duty cycle corrector that limits the maximum pulse width is used to avoid the problem of missing clock edges due to the mismatch between rising and falling time of VCDL's delay cells. The proposed CDR is implemented in 0.18 um technology with the supply voltage of 1.8 V. The active die area is $660\;{\mu}m\;{\times}\;250\;{\mu}m$, and supply voltage is 1.8 V. Peak-to-Peak jitter is less than 15 ps and the power consumption of the CDR except input buffer, equalizer, and de-serializer is 5.94 mW.

PVC Classification based on QRS Pattern using QS Interval and R Wave Amplitude (QRS 패턴에 의한 QS 간격과 R파의 진폭을 이용한 조기심실수축 분류)

  • Cho, Ik-Sung;Kwon, Hyeog-Soong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.4
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    • pp.825-832
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    • 2014
  • Previous works for detecting arrhythmia have mostly used nonlinear method such as artificial neural network, fuzzy theory, support vector machine to increase classification accuracy. Most methods require accurate detection of P-QRS-T point, higher computational cost and larger processing time. Even if some methods have the advantage in low complexity, but they generally suffer form low sensitivity. Also, it is difficult to detect PVC accurately because of the various QRS pattern by person's individual difference. Therefore it is necessary to design an efficient algorithm that classifies PVC based on QRS pattern in realtime and decreases computational cost by extracting minimal feature. In this paper, we propose PVC classification based on QRS pattern using QS interval and R wave amplitude. For this purpose, we detected R wave, RR interval, QRS pattern from noise-free ECG signal through the preprocessing method. Also, we classified PVC in realtime through QS interval and R wave amplitude. The performance of R wave detection, PVC classification is evaluated by using 9 record of MIT-BIH arrhythmia database that included over 30 PVC. The achieved scores indicate the average of 99.02% in R wave detection and the rate of 93.72% in PVC classification.