• Title/Summary/Keyword: low-complexity algorithms

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A comparative study of low-complexity MMSE signal detection for massive MIMO systems

  • Zhao, Shufeng;Shen, Bin;Hua, Quan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.4
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    • pp.1504-1526
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    • 2018
  • For uplink multi-user massive MIMO systems, conventional minimum mean square error (MMSE) linear detection method achieves near-optimal performance when the number of antennas at base station is much larger than that of the single-antenna users. However, MMSE detection involves complicated matrix inversion, thus making it cumbersome to be implemented cost-effectively and rapidly. In this paper, we first summarize in detail the state-of-the-art simplified MMSE detection algorithms that circumvent the complicated matrix inversion and hence reduce the computation complexity from ${\mathcal{O}}(K^3)$ to ${\mathcal{O}}(K^2)$ or ${\mathcal{O}}(NK)$ with some certain performance sacrifice. Meanwhile, we divide the simplified algorithms into two categories, namely the matrix inversion approximation and the classical iterative linear equation solving methods, and make comparisons between them in terms of detection performance and computation complexity. In order to further optimize the detection performance of the existing detection algorithms, we propose more proper solutions to set the initial values and relaxation parameters, and present a new way of reconstructing the exact effective noise variance to accelerate the convergence speed. Analysis and simulation results verify that with the help of proper initial values and parameters, the simplified matrix inversion based detection algorithms can achieve detection performance quite close to that of the ideal matrix inversion based MMSE algorithm with only a small number of series expansions or iterations.

Related-Key Differential Attacks on CHESS-64

  • Luo, Wei;Guo, Jiansheng
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.9
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    • pp.3266-3285
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    • 2014
  • With limited computing and storage resources, many network applications of encryption algorithms require low power devices and fast computing components. CHESS-64 is designed by employing simple key scheduling and Data-Dependent operations (DDO) as main cryptographic components. Hardware performance for Field Programmable Gate Arrays (FPGA) and for Application Specific Integrated Circuits (ASIC) proves that CHESS-64 is a very flexible and powerful new cipher. In this paper, the security of CHESS-64 block cipher under related-key differential cryptanalysis is studied. Based on the differential properties of DDOs, we construct two types of related-key differential characteristics with one-bit difference in the master key. To recover 74 bits key, two key recovery algorithms are proposed based on the two types of related-key differential characteristics, and the corresponding data complexity is about $2^{42.9}$ chosen-plaintexts, computing complexity is about $2^{42.9}$ CHESS-64 encryptions, storage complexity is about $2^{26.6}$ bits of storage resources. To break the cipher, an exhaustive attack is implemented to recover the rest 54 bits key. These works demonstrate an effective and general way to attack DDO-based ciphers.

Second Order Suboptimal Power Allocation for MIMO-OFDM Based Cognitive Radio Systems

  • Nguyen, Tien Hoa;Nguyen, Thanh Hieu;Nguyen, Van Duc;Ha, Duyen Trung;Gelle, Guilllaume;Choo, Hyunseung
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.8
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    • pp.2647-2662
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    • 2014
  • This paper proposes an efficient and low complexity power-loading algorithm for MIMO-OFDM downlink based cognitive radio system that maximizes the sum rate of single secondary user (SU) under constraints on the tolerable interference thresholds between secondary user and primary user's frequency bands and the total transmission power. Our suboptimal algorithm is based on the $2^{nd}$ order interference tracking and nulling mechanism to allocate transmission power of the subcarriers among SU's scheme. The performance of our proposed suboptimal scheme is compared with the performance of the classical power loading algorithms, e.g., water filling, $1^{st}$ order interference tracking, nulling, and other suboptimal schemes. Numerical results show that our algorithm has low complexity but obtains a higher channel capacity than that of some previous suboptimal algorithms in some scenarios. We dedicate also that for a given interference threshold, the $2^{nd}$ order interference tracking mechanism has dynamic number of nulling position instead fixed number of nulling position.

A Hierarchical Round-Robin Algorithm for Rate-Dependent Low Latency Bounds in Fixed-Sized Packet Networks (고정크기 패킷 네트워크 환경에서 할당율에 비례한 저지연 한계를 제공하는 계층적 라운드-로빈 알고리즘)

  • Pyun Kihyun
    • Journal of KIISE:Information Networking
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    • v.32 no.2
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    • pp.254-260
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    • 2005
  • In the guaranteed service, a real-time scheduling algorithm must achieve both high level of network utilization and scalable implementation. Here, network utilization indicates the number of admitted real-time sessions. Unfortunately, existing scheduling algorithms either are lack of scalable implementation or can achieve low network utilization. For example, scheduling algorithms based on time-stamps have the problem of O(log N) scheduling complexity where N is the number of sessions. On the contrary, round-robin algorithms require O(1) complexity. but can achieve just a low level of network utilization. In this paper, we propose a scheduling algorithm that can achieve high network utilization without losing scalability. The proposed algorithm is a Hierarchical Round-Robin (H-RR) algorithm that utilizes multiple rounds with different interval sizes. It provides latency bounds similar to those by Packet-by-Packet Generalized Processor Sharing (PGPS) algorithm using a sorted-Priority queue. However, H-RR requires a constant time for implementation.

Design and Performance Evaluation of Hardware Cryptography Method (하드웨어 암호화 기법의 설계 및 성능분석)

  • Ah, Jae-Yong;Ko, Young-Woong;Hong, Cheol-Ho;Yoo, Hyuck
    • Journal of KIISE:Information Networking
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    • v.29 no.6
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    • pp.625-634
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    • 2002
  • Cryptography is the methods of making and using secret writing that is necessary to keep messages private between two parties. Cryptography is compute-intensive algorithm and needs cpu resource excessively. To solve these problems, there exists hardware approach that implements cryptographic algorithm with hardware chip. In this paper, we presents the design and implementation of cryptographic hardware and compares its performance with software cryptographic algorithms. The experimental result shows that the hardware approach causes high I/O overheads when it transmits data between cryptographic board and host cpu. Hence, low complexity cryptographic algorithms such as DES does not improve the performance. But high complexity cryptographic algorithms such as Triple DES improve the performance with a high rate, roughly from two times to Sour times.

Fast Channel Allocation for Ultra-dense D2D-enabled Cellular Network with Interference Constraint in Underlaying Mode

  • Dun, Hui;Ye, Fang;Jiao, Shuhong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.15 no.6
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    • pp.2240-2254
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    • 2021
  • We investigate the channel allocation problem in an ultra-dense device-to-device (D2D) enabled cellular network in underlaying mode where multiple D2D users are forced to share the same channel. Two kinds of low complexity solutions, which just require partial channel state information (CSI) exchange, are devised to resolve the combinatorial optimization problem with the quality of service (QoS) guaranteeing. We begin by sorting the cellular users equipment (CUEs) links in sequence in a matric of interference tolerance for ensuring the SINR requirement. Moreover, the interference quota of CUEs is regarded as one kind of communication resource. Multiple D2D candidates compete for the interference quota to establish spectrum sharing links. Then base station calculates the occupation of interference quota by D2D users with partial CSI such as the interference channel gain of D2D users and the channel gain of D2D themselves, and carries out the channel allocation by setting different access priorities distribution. In this paper, we proposed two novel fast matching algorithms utilize partial information rather than global CSI exchanging, which reduce the computation complexity. Numerical results reveal that, our proposed algorithms achieve outstanding performance than the contrast algorithms including Hungarian algorithm in terms of throughput, fairness and access rate. Specifically, the performance of our proposed channel allocation algorithm is more superior in ultra-dense D2D scenarios.

Low Complexity Iterative Detection and Decoding using an Adaptive Early Termination Scheme in MIMO system (다중 안테나 시스템에서 적응적 조기 종료를 이용한 낮은 복잡도 반복 검출 및 복호기)

  • Joung, Hyun-Sung;Choi, Kyung-Jun;Kim, Kyung-Jun;Kim, Kwang-Soon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.8C
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    • pp.522-528
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    • 2011
  • The iterative detection and decoding (IDD) has been shown to dramatically improve the bit error rate (BER) performance of the multiple-input multiple-output (MIMO) communication systems. However, these techniques require a high computational complexity since it is required to compute the soft decisions for each bit. In this paper, we show IDD comprised of sphere decoder with low-density parity check (LDPC) codes and present the tree search strategy, called a layer symbol search (LSS), to obtain soft decisions with a low computational complexity. In addition, an adaptive early termination is proposed to reduce the computational complexity during an iteration between an inner sphere decoder and an outer LDPC decoder. It is shown that the proposed approach can achieve the performance similar to an existing algorithm with 70% lower computational complexity compared to the conventional algorithms.

Low Computational Complexity LDPC Decoding Algorithms for DVB-S2 Systems (DVB-S2 시스템을 위한 저복잡도 LDPC 복호 알고리즘)

  • Jung Ji-Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.10 s.101
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    • pp.965-972
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    • 2005
  • In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen for second generation digital video broadcasting standard, are required a large number of computation due to large size of coded block and iteration. Therefore, we presented two kinds of low computational algorithm for LDPC codes. First, sequential decoding with partial group is proposed. It has same H/W complexity, and fewer number of iteration's are required at same performance in comparison with conventional decoder algerian. Secondly, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and computational complexity of early detected method is about $50\%$ offs in case of check node update, $99\%$ offs in case of check node update compared to conventional scheme.

Iterative Reliability-Based Modified Majority-Logic Decoding for Structured Binary LDPC Codes

  • Chen, Haiqiang;Luo, Lingshan;Sun, Youming;Li, Xiangcheng;Wan, Haibin;Luo, Liping;Qin, Tuanfa
    • Journal of Communications and Networks
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    • v.17 no.4
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    • pp.339-345
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    • 2015
  • In this paper, we present an iterative reliability-based modified majority-logic decoding algorithm for two classes of structured low-density parity-check codes. Different from the conventional modified one-step majority-logic decoding algorithms, we design a turbo-like iterative strategy to recover the performance degradation caused by the simply flipping operation. The main computational loads of the presented algorithm include only binary logic and integer operations, resulting in low decoding complexity. Furthermore, by introducing the iterative set, a very small proportion (less than 6%) of variable nodes are involved in the reliability updating process, which can further reduce the computational complexity. Simulation results show that, combined with the factor correction technique and a well-designed non-uniform quantization scheme, the presented algorithm can achieve a significant performance improvement and a fast decoding speed, even with very small quantization levels (3-4 bits resolution). The presented algorithm provides a candidate for trade-offs between performance and complexity.

A Fast and Low-complexity Motion Estimation for UHD HEVC (초고화질 영상처리를 위한 HEVC 표준에 적합한 고속 및 저복잡도 움직임 예측기에 대한 연구)

  • Kim, Sungoh;Park, Chansik;Chun, Hyungju;Kim, Jaemoon
    • Journal of Broadcast Engineering
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    • v.18 no.6
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    • pp.808-815
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    • 2013
  • In this paper, we propose a novel fast and low-complexity Motion Estimation (ME) algorithm for Ultra High Definition (UHD) High Efficiency Video Coding (HEVC). Motion estimation occupies 77~81% of the amount of computation in HEVC. After all, the main key of video codec implementation is to find a fast and low-complexity motion estimation algorithm and architecture. We analyze the previous motion estimation algorithms and propose three optimal algorithm to reduce the computation proportion for HEVC. The proposed algorithm uses only 0.36% of the amount of operations compared to full search algorithm while maintaining compression performance with slight loss of 1.1%.