• 센서학회지
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• 제18권1호
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• pp.95-101
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• 2009

A simple and new CMOS potentiostat circuit for amperometric sensor is described. To maintain a constant potential between the reference and working electrodes, only one differential difference amplifier (DDA) is needed in proposed design, while conventional potentiosatat requires at least 2 operational amplifiers and 2 resistors, or more than 3 operational amplifiers and 4 resistors for low voltage CMOS integrated potentiostat. The DDA with rail-to-rail design not only enables the full range operation to supply voltage but also provides simple potentiostat system with small hardwares and low power consumption.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2008년도 춘계학술대회 논문집
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• pp.1853-1859
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• 2008

IGBT modules are designed for low loss, rugged for all environments and user friendly. Low on state saturation voltage with high switching speed is the primary concerns. In this paper selection of IGBT, module ratings and characteristics are discussed. The IGBT design topic of protection against over voltage and over current are covered. Emphasis on turn off switching, short circuit switching and necessary precautions are dealt. Selection of IGBT device, gate drive power, and its lay out considerations are covered in detail.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.1488-1490
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• 2008

The gyroscope is the sensor for detecting the rotation in inertial reference frame and constitute the navigation system together an accelerometer. As the inertial reference equipment for attitude determination and control in the satellite, the mechanical gyroscope has been used but it bring the disturbance for mass unbalance so the disturbance give a bad influence to the observation satellite mission because the mechanical gyroscope has the rotation parts. During the launch, The mechanical gyroscope is weak in vibration, shock and has the defect of narrow operating temperature range so it need the special design in integration. Recently the low orbit observation satellite for seeking the high pointing accuracy of image camera payload accept the FOG(Fiber Optic Gyro) or RLG(Ring Laser Gyro) for the attitude determination and control. The Ring Laser Gyro makes use of the Sanac effect within a resonant ring cavity of a He-Ne laser and has more accuracy than the other gyros. It need the 1000V DC to create the He-Ne plasma in discharge tube. In this paper, the design process of the High Voltage Power Supply for RLG(Ring Laser Gyroscope) is described. The specification for High Voltage Power Supply(HVPS) is proposed. Also, The analysis of flyback converter topology is explained. The Design for the HVPS is composed of the inverter circuit, feedback control circuit, high frequency switching transformer design and voltage doubler circuit.

• 전력전자학회논문지
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• 제17권4호
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• pp.330-336
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• 2012

In this paper, novel zero-voltage-transition(ZVT) synchronous buck converter of pulse-width-modulation(PWM) method is proposed to utilize auxiliary circuit. In this proposed scheme, designed to operate low output voltage for portable system and applied synchronous scheme to improve efficiency. Also proposed circuit is designed to do soft-switching operation in every switch. In this paper, the circuit operation is explained and analysed, and design guidelines are presented. To verify the availability of the proposed circuit, experiment and simulation is carried out.

• 한국철도학회:학술대회논문집
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• 한국철도학회 1999년도 춘계학술대회 논문집
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• pp.328-335
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• 1999

Three phase full bridge rectifier has been used to obtain dc voltage from three phase ac voltage source. The rectifier system has drawbacks that power factor is low and power flow is unidirectional. Therefore, when dc voltage increases due to regeneration of power the dynamic resister for dissipation of regeneration power must be installed. But three phase PWM converter can be controlled to operate with unity power factor and bidirectional power flow. Therefore when the PWM converter is used as do supply system, the dissipating resistor is not necessary. On this thesis, in order to design a controller having good performance, the hee phase PWM converter is completely modeled by using circuit DQ-transformation and thus a general and simple instructive equivalent circuit is obtained; the inductor set becomes a second order gyrator-coupled system and three phase inverter becomes a transformer as well. Under given phase angle(${\alpha}$) and modulation index(MI) of the three phase inverter, the dc and ac characteristics are obtained by analysis of the transformed equivalent circuit The validity of the equivalent circuit is confirmed through PSPICE simulation. And based on the dc and ac characteristics a controller with unity power factor is proposed.

• 대한전자공학회논문지TC
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• 제43권3호
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• pp.68-77
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• 2006

본 논문에서는 4.5-5.5GHz 저잡음 증폭기 (low noise amplifiers, LNAs)를 위한 새로운 구조의 검사용 설계(Design-for-Testability, DfT) 회로를 제안한다. 이러한 검사용 설계회로는 고가의 장비를 사용하지 알고도 저잡음 증폭기의 전압 이득, 잡음 지수, 입력 임피던스, 입력 반사 손실 및 출력 신호대 잡음 전력비를 측정한다. 검사용 설계회로는 $0.18{\mu}m$ SiGe 공정을 이용하여 설계되었으며, 입력 임피던스 정합과 직류 출력 전압 측정을 이용한다. 이러한 회로를 이용한 회로 검사 기술은 검사 방법이 간단하고 검사하는데 드는 비용이 저렴하다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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• pp.267-269
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• 2007

PLL(Phase Locked Loop) are widely used circuit technique in modern electronic systems. In this paper, We propose the low voltage and high speed PLL. We design the PFD(Phase Frequency Detector) by using TSPC (True Single Phase Clock) circuit to improve the performance and solve the dead-zone problem. We use CP(Charge Pump} and LP(Loop filter) for Negative feedback and current reusing in order to solve current mismatch and switch mismatch problem. The VCO(Voltage controlled Oscillator) with 5-stage differential ring oscillator is used to exact output frequency. The divider is implemented by using D-type flip flops asynchronous dividing. The frequency divider has a constant division ratio 32. The frequency range of VCO has from 200MHz to 1.1GHz and have 1.7GHz/v of voltage gain. The proposed PLL is designed by using 0.18um CMOS processor with 1.8V supply voltage. Oscillator's input frequency is 25MHz, VCO output frequency is 800MHz and lock time is 5us. It is evaluated by using cadence spectra RF tools.

• 전자공학회논문지A
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• 제33A권5호
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• pp.212-221
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• 1996

A CMOS comparator is designed for low voltage and low power operations. The proposed comparator consists of a preadmplifier followed by a regenerative latch. The preasmplifier reduces the power consumption to a half with the power-down mode and the dynamic offsets of the latch, which is affected by each device mismatch, is statistically analyzed. The circuit is designed and simulated using a 0.8.mu.m n-well CMOS process and the dissipated power is 0.16mW at a 20MHz clock speed based on a 3V supply.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1997년도 전력전자학술대회 논문집
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• pp.261-265
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• 1997

Driving the electrodeless fluorescent lamp, the high ac voltage with high frequency is required. The linear power amplifier has been widely used as a driving circuit of electrodeless fluorescent lamp. However, the low efficiency of the power amplifier causes th driving circuit to be replaced by a PWM switching inverter. In order to use a PWM switching inverter as the driving circuit of an electrodeless fluorescent lamp, the high switching frequency is required. But due to the switching loss at switches of the inverter, the limitation of high switching frequency appears in the inverter. One solution to this limitation is to reduce the switching loss by using the zero voltage switching technique. In this paper, zero voltage switching resonant inverter for driving an electrodeless fluorescent lamp is discussed. The results of analysis about the inverter are presented and the equations for design are established. And the validity of the analyzed results are verified through the experiment.

• 한국전자통신학회논문지
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• 제11권2호
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• pp.159-164
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• 2016

무선통신시스템은 한정된 에너지를 갖는 배터리를 사용하기 때문에 저전력 회로로 구현되어야 하며, 이를 위하여 주파수와 상관없이 일정한 전력을 나타내는 전류모드 회로가 연구되어왔다. 본 논문에서는 초저전력 동작이 가능하도록 Dynamic Voltage Scaling 전원을 유도하며, 전류모드 신호처리 중 메모리 동작에서 저장된 에너지가 누설되는 Clock-Feedthrough 문제를 최소화하는 전류메모리 회로를 제안한다. $0.35{\mu}m$ 공정의 BSIM3 모델로 Near-threshold 영역의 전원 전압을 사용한 시뮬레이션을 진행한 결과, 1MHz의 스위칭 동작에서 $2{\mu}m$의 메모리 MOS Width, $0.3{\mu}m$의 스위치 MOS Width, $13{\mu}m$의 Dummy MOS Width로 설계할 때, Clock-Feedthrough의 영향을 최소화시킬 수 있었으며 1.2V의 Near-threshold 전원전압에서 소비전력은 $3.7{\mu}W$가 계산되었다.