• Title/Summary/Keyword: low voltage circuit design

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Design of a AC driver with constant current and negative temperature resistance for a LED lamp (정전류와 부 열저항 특성을 갖는 AC Direct Driver를 이용한 LED 형광등 개발)

  • Kim, Hyun-jo;Son, Kyung-min;Kim, Min;Kim, Gwan-Hyung;Byun, Gi-sik
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.05a
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    • pp.382-384
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    • 2013
  • LED is much brighter than the traditional incandescent, and low power consumption. Development and commercialization of LED fluorescent lamp is made in order to improve efficient fluorescent lamps with this existing and environmental problems. Because, unlike fluorescent lamps, it is not possible to directly use AC power to the unidirectional element having a polarity, LED requires a power supply. The power supply function is lowered as compared with the fluorescent lamp common in terms of maintenance costs because of the high price large. In this study, we constructed a circuit that can be controlled with a constant current in order to eliminate a phenomenon that brightness of the light which rectifies the AC power supply easy to place in the power supply due to the current change due to the voltage fluctuation is changed, in maintenance, I would like to propose how to develop a device which can be easily replaced less expensive composed of interchangeable modules of Plug in / out method to distinguish the LED module this.

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A Characteristics Analysis of Push Pull type High Frequency DC-DC Converter using Resonant Element with ZVS Capacitor (ZVS 커패시터를 공진요소로 이용한 Push Pull형 고주파 DC-DC 컨버터의 특성해석)

  • 안항목;남승식;김동희;노채균;이달해
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.14 no.4
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    • pp.65-72
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    • 2000
  • This paper proposes a Push type High Frequency DC-DC Converter using Zero Voltage Switching to reduce turn on and off loss at the switching instants. This paper has a advantage which is able to operating safely in load short, because DC reactor is connected with resonance reactor in order to supply a fixed safely in load short, because DC reactor is connected with resonance reactor in order to supply a fixed current with low ripple from DC power supply. The capacitor $(C_1, C_2)$ connected in switch are a common using as resonance capacitor and ZVS capacitor. The analysis of the proposed high frequency resonance DC-DC converter is generally described by using normallized parameter, and we has evaluated characteristic values which is needed to design a circuit. We conform a rightfulness of theoritical analysis by comparing a theoretical values and experimental values obtained from experiment using MOSFET as switching devices.

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A Study on the Development of Digital Output Load Cell (계량설비용 디지탈 출력 로드셀의 개발에 관한 연구)

  • Park, Chan-Won;An, Kwang-Hee
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.11 no.1
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    • pp.114-122
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    • 1997
  • This paper describes the design and development of a smart digital load cell used forweighing installations. Sice the load cell sensor to be used is very sensitive for weight cariation, the load cell must have the temperature stability, low-drift and the high-resolution of the A/D conversion for accuracy. A new analog circuit which is controlled by one chip micro-processer has been developed to reduce the offset voltage and the drift characteristics of operational amplifiers, and has been adapted into the digital load cell. Also, a software algorithm has been developed to obtain the stable and accurate A/D conversion. This software includes a RS-485 communication program to control the digital load cell, which gives a capability of backing-up the calibration data and transferring control data. The simulation and evaluation of the designed digital load cell has been shown as having the good performance. which will give useful application to the weighing installations as a remote weighing sensor.

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Low-power Lattice Wave Digital Filter Design Using CPL (CPL을 이용한 저전력 격자 웨이브 디지털 필터의 설계)

  • 김대연;이영중;정진균;정항근
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.10
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    • pp.39-50
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    • 1998
  • Wide-band sharp-transition filters are widely used in applications such as wireless CODEC design or medical systems. Since these filters suffer from large sensitivity and roundoff noise, large word-length is required for the VLSI implementation, which increases the hardware size and the power consumption of the chip. In this paper, a low-power implementation technique for digital filters with wide-band sharp-transition characteristics is proposed using CPL (Complementary Pass-Transistor Logic), LWDF (Lattice Wave Digital Filter) and a modified DIFIR (Decomposed & Interpolated FIR) algorithm. To reduce the short-circuit current component in CPL circuits due to threshold voltage reduction through the pass transistor, three different approaches can be used: cross-coupled PMOS latch, PMOS body biasing and weak PMOS latch. Of the three, the cross-coupled PMOS latch approach is the most realistic solution when the noise margin as well as the energy-delay product is considered. To optimize CPL transistor size with insight, the empirical formulas for the delay and energy consumption in the basic structure of CPL circuits were derived from the simulation results. In addition, the filter coefficients are encoded using CSD (Canonic Signed Digit) format and optimized by a coefficient quantization program. The hardware cost is minimized further by a modified DIFIR algorithm. Simulation result shows that the proposed method can achieve about 38% reductions in power consumption compared with the conventional method.

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A Study on an Error Correction Code Circuit for a Level-2 Cache of an Embedded Processor (임베디드 프로세서의 L2 캐쉬를 위한 오류 정정 회로에 관한 연구)

  • Kim, Pan-Ki;Jun, Ho-Yoon;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.15-23
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    • 2009
  • Microprocessors, which need correct arithmetic operations, have been the subject of in-depth research in relation to soft errors. Of the existing microprocessor devices, the memory cell is the most vulnerable to soft errors. Moreover, when soft errors emerge in a memory cell, the processes and operations are greatly affected because the memory cell contains important information and instructions about the entire process or operation. Users do not realize that if soft errors go undetected, arithmetic operations and processes will have unexpected outcomes. In the field of architectural design, the tool that is commonly used to detect and correct soft errors is the error check and correction code. The Itanium, IBM PowerPC G5 microprocessors contain Hamming and Rasio codes in their level-2 cache. This research, however, focuses on huge server devices and does not consider power consumption. As the operating and threshold voltage is currently shrinking with the emergence of high-density and low-power embedded microprocessors, there is an urgent need to develop ECC (error check correction) circuits. In this study, the in-output data of the level-2 cache were analyzed using SimpleScalar-ARM, and a 32-bit H-matrix for the level-2 cache of an embedded microprocessor is proposed. From the point of view of power consumption, the proposed H-matrix can be implemented using a schematic editor of Cadence. Therefore, it is comparable to the modified Hamming code, which uses H-spice. The MiBench program and TSMC 0.18 um were used in this study for verification purposes.

A Study on Fabrication and Performance Evaluation of Wideband 2-Mode HPA for the Satellite Mobile Communications System (이동위성 통신용 광대역 2단 전력제어 HPA의 구현 및 성능평가에 관한 연구)

  • 전중성;김동일;배정철
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.3
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    • pp.517-531
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    • 1999
  • This paper presents the development of the 2-mode variable gain high power amplifier for a transmitter of INMARSAT-M operating at L-band(1626.5-1646.5 MHz). This SSPA(Solid State Power Amplifier) is amplified 42 dBm in high power mode and 36 dBm in low power mode for INMARSAT-M. The allowable error sets +1 dBm of an upper limit and -2 dBm of a lower limit, respectively. To simplify the fabrication process, the whole system is designed by two parts composed of a driving amplifier and a high power amplifier, The HP's MGA-64135 and Motorola's MRF-6401 are used for driving amplifier, and the ERICSSON's PTE-10114 and PTF-10021 are used the high power amplifier. The SSPA was fabricated by the circuits of RF, temperature compensation and 2-mode gain control circuit in aluminum housing. The gain control method was proposed by controlling the voltage for the 2-mode. In addition, It has been experimentally verified that the gain is controlled for single tone signal as well as two tone signals. The realized SSPA has 42 dB and 36 dB for small signal gain within 20 MHz bandwidth, and the VSWR of input and output port is less than 1.5:1 The minimum value of the 1 dB compression point gets 5 dBm for 2-mode variable gain high power amplifier. A typical two tone intermodulation point has 32.5 dBc maximum which is single carrier backed off 3 dB from 1 dB compression point. The maximum output power of 43 dBm was achieved at the 1636.5 MHz. These results reveal a high power of 20 Watt, which was the design target.the design target.

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Design of pHEMT channel structure for single-pole-double-throw MMIC switches (SPDT 단일고주파집적회로 스위치용 pHEMT 채널구조 설계)

  • Mun Jae Kyoung;Lim Jong Won;Jang Woo Jin;Ji, Hong Gu;Ahn Ho Kyun;Kim Hae Cheon;Park Chong Ook
    • Journal of the Korean Vacuum Society
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    • v.14 no.4
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    • pp.207-214
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    • 2005
  • This paper presents a channel structure for promising high performance pseudomorphic high electron mobility transistor(pHEMT) switching device for design and fabricating of microwave control circuits, such as switches, phase shifters, attenuators, limiters, for application in personal mobile communication systems. Using the designed epitaxial channel layer structure and ETRI's $0.5\mu$m pHEMT switch process, single pole double throw (SPDT) Tx/Rx monolithic microwave integrated circuit (MMIC) switch was fabricated for 2.4 GHz and 5 GHz band wireless local area network (WLAN) systems. The SPDT switch exhibits a low insertion loss of 0.849 dB, high isolation of 32.638 dB, return loss of 11.006 dB, power transfer capability of 25dBm, and 3rd order intercept point of 42dBm at frequency of 5.8GHz and control voltage of 0/-3V These performances are enough for an application to 5 GHz band WLAN systems.

A 2.4 GHz Bio-Radar System with Small Size and Improved Noise Performance Using Single Circular-Polarized Antenna and PLL (하나의 원형 편파 안테나와 PLL을 이용하여 소형이면서도 개선된 잡음 성능을 갖는 2.4 GHz 바이오 레이더 시스템)

  • Jang, Byung-Jun;Park, Jae-Hyung;Yook, Jong-Gwan;Moon, Jun-Ho;Lee, Kyoung-Joung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.12
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    • pp.1325-1332
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    • 2009
  • In this paper, we design a 2.4 GHz bio-radar system that can detect human heartbeat and respiration signals with small size and improved noise performance using single circular-polarized antenna and phase-locked loop. The demonstrated bio-radar system consists of single circular-polarized antenna with $90^{\circ}$ hybrid, low-noise amplifier, power amplifier, voltage-controlled oscillator with phase-locked loop circuits, quadrature demodulator and analog circuits. To realize compact size, the printed annular ring stacked microstrip antenna is integrated on the transceiver circuits, so its dimension is just $40\times40mm^2$. Also, to improve signal-to-noise-ratio performance by phase noise due to transmitter leakage signal, the phase-locked loop circuit is used. The measured results show that the heart rate and respiration accuracy was found to be very high for the distance of 50 cm without the additional digital signal processing.