• Title/Summary/Keyword: low voltage circuit design

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Design of Multiband Octa-Phase LC VCO for SDR (SDR을 위한 다중밴드 Octa-Phase LC 전압제어 발진기 설계)

  • Lee, Sang-Ho;Han, Byung-Ki;Lee, Jae-Hyuk;Kim, Hyeong-Dong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.7 s.361
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    • pp.7-11
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    • 2007
  • This paper presents a multiband octa-phase LC VCO for SDR receiver. Four identical LC VCOs are connected by using series coupling transistor to obtain the octa-phase signal and low phase noise characteristic. For a multiband application, a band tuning circuit that consists of a switch capacitor circuit and two MOS varactors is proposed. As the MOS switch is on/off state, the frequency range will be varied. In addition, two varactors make the VCO be immune to process variation of the oscillation frequency. The VCO is designed in 0.18-um CMOS technology, consumes 12mA current from 1.8V supply voltage and operates with a frequency band from 885MHz to 1.342GHz (41% tuning range). As driving sub-harmonic mixer, the proposed VCO covers 3 standards(CDMA 2000 1x, WCDMA, WiBro). The measured phase noise is -105dBc@100kHz, -115dBc@1MHz, -130dBc@10MHz for CDMA 2000 1x, WCDMA, WiBro respectively.

Make-up of Equivalent Circuit of Grounding System using Water Resistivity in Hemispherical Electrode System (반구형 전극계에서 물의 저항률을 이용한 접지시스템의 등가회로 구성)

  • Lee, Bok-Hee;Choi, Jong-Hyuk;Bae, Sung-Bae
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.8
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    • pp.109-115
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    • 2008
  • A design criterion of grounding systems is commonly based on the ground resistance measured with low frequency in Korea. When lightning surges which have high frequency components are injected into the grounding system, the grounding impedance is great]y different from the static grounding resistance. In order to investigate the effect of water resistivity on the high frequency performance of grounding systems, this paper presents the frequency-dependent admittance using water tank simulating the grounding system in different water resistivities. As a result, because of capacitive effect admittances and conductance are increased with increasing frequency in higher water resistivity of greater than 500[${\Omega}{\cdot}m$]. On the other hand, admittances and conductances are decreased with increasing frequency due to inductive effect in lower water resistivity of less than 500[${\Omega}{\cdot}m$]. The phase difference between the current and voltage increases in the range of 200[kHz] to 5[MHz]. Consequently, frequency-dependent performance of grounding systems is closely related to the soil resistivity, it is necessary to consider the effect of grounding system performance on the frequency and soil resistivity.

Design of a Novel Instrumentation Amplifier using Current-conveyor(CCII) (전류-컨베이어(CCII)를 사용한 새로운 계측 증폭기 설계)

  • CHA, Hyeong-Woo;Jeong, Tae-Yun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.80-87
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    • 2013
  • A novel instrumentation amplifier(IA) using positive polarity current-conveyor(CCII+) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of two CCII+, three resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into two CCII+ used voltage and current follower converts into same currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the CCII+ and used commercial op-amp LF356. Simulation results show that voltage follower used CCII+ has offset voltage of 0.21mV at linear range of ${\pm}$4V. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the gain of 60dB was 400kHz. The IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 130mW at supply voltage of ${\pm}$5V.

High-Speed Digital/Analog NDR ICs Based on InP RTD/HBT Technology

  • Kim, Cheol-Ho;Jeong, Yong-Sik;Kim, Tae-Ho;Choi, Sun-Kyu;Yang, Kyoung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.3
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    • pp.154-161
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    • 2006
  • This paper describes the new types of ngative differential resistance (NDR) IC applications which use a monolithic quantum-effect device technology based on the RTD/HBT heterostructure design. As a digital IC, a low-power/high-speed MOBILE (MOnostable-BIstable transition Logic Element)-based D-flip flop IC operating in a non-return-to-zero (NRZ) mode is proposed and developed. The fabricated NRZ MOBILE D-flip flop shows high speed operation up to 34 Gb/s which is the highest speed to our knowledge as a MOBILE NRZ D-flip flop, implemented by the RTD/HBT technology. As an analog IC, a 14.75 GHz RTD/HBT differential-mode voltage-controlled oscillator (VCO) with extremely low power consumption and good phase noise characteristics is designed and fabricated. The VCO shows the low dc power consumption of 0.62 mW and good F.O.M of -185 dBc/Hz. Moreover, a high-speed CML-type multi-functional logic, which operates different logic function such as inverter, NAND, NOR, AND and OR in a circuit, is proposed and designed. The operation of the proposed CML-type multi-functional logic gate is simulated up to 30 Gb/s. These results indicate the potential of the RTD based ICs for high speed digital/analog applications.

Design of Subthreshold SRAM Array utilizing Advanced Memory Cell (개선된 메모리 셀을 활용한 문턱전압 이하 스태틱 램 어레이 설계)

  • Kim, Taehoon;Chung, Yeonbae
    • Journal of IKEEE
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    • v.23 no.3
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    • pp.954-961
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    • 2019
  • This paper suggests an advanced 8T SRAM which can operate properly in subthreshold voltage regime. The memory cell consists of symmetric 8 transistors, in which the latch storing data is controlled by a column-wise assistline. During the read, the data storage nodes are temporarily decoupled from the read path, thus eliminating the read disturbance. Additionally, the cell keeps the noise-vulnerable 'low' node close to the ground, thereby improving the dummy-read stability. In the write, the boosted wordline facilitates to change the contents of the memory bit. At 0.4 V supply, the advanced 8T cell achieves 65% higher dummy-read stability and 3.7 times better write-ability compared to the commercialized 8T cell. The proposed cell and circuit techniques have been verified in a 16-kbit SRAM array designed with an industrial 180-nm low-power CMOS process.

Design of High Frequency Boosting Circuits Compensating for Hearing Loss (청력 보정을 위한 고주파 증폭 회로 설계)

  • Lee, Kwang;Jung, Young-Jin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.3
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    • pp.138-144
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    • 2017
  • In this paper, we propose a high frequency boosting circuits compensating for age-related hearing loss. The frequency response of this hearing loss is quite similar to that of a low-pass filter of which the critical frequency get lower with age. Therefore the voltage gain of this compensation circuits increase proportionally to the frequency of signals when the frequency is higher than the critical frequency and the voltage is constant irrespective of the frequency of signals when the frequency is lower than the critical frequency. The proposed circuits consist of a differential circuit and a unity gain amplifier. Because the critical frequency of the proposed circuits is controlled simply in the shape of a volume control lever, the aged people can adjust the high frequency boosting level easily according to one's hearing loss level. The critical frequency is continuously controllable in the whole audible frequency band and the gain of this high frequency boosting circuits is above 80dB at 10kHz.

A Novel Power Frequency Changer Based on Utility AC Connected Half-Bridge One Stage High Frequency AC Conversion Principle

  • Saha Bishwajit;Koh Kang-Hoon;Kwon Soon-Kurl;Lee Hyun-Woo;Nakaoka Mutsuo
    • Proceedings of the KIPE Conference
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    • 2006.06a
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    • pp.203-205
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    • 2006
  • This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit incorporating boost-half-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switching mode and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft switching (ZVS) operation ranges and the power dissipation as compared with those of the previously developed high-frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation (PWM) and pulse density modulation (PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

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Design of Hysteretic Buck Converter with A Low Output Ripple Voltage and Fixed Switching Frequency in CCM (작은 출력 전압 리플과 연속 전도모드에서 고정된 스위칭 주파수를 가지는 히스테리틱 벅 변환기 설계)

  • Jeong, Tae-Jin;Jo, Yong-Min;Lee, Tae-Heon;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.6
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    • pp.50-56
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    • 2015
  • An efficient fast response hysteretic buck converter suitable for mobile application is propoesed. The problems of large output ripple and difficulty in using of small power inductor that conventional hysteretic converter has are improved by adding ramp generator. and the changeable switching frequency with load current is fixed by adding a delay time control circuit composed of PLL structure resulting in decrease of EMI noise. The circuits are implemented by using BCDMOS 0.35um 2-polt 4-metal process. Measurement results show that the converter operates with a switching frequency of 1.85MHz when drives 80mA load current. As the converter drives over 170mA load current, the switching frequency is fixed on 2MHz. The converter has output ripple voltage of less 20mV and more than efficiency 85% with 50~500mA laod current condition.

A Design of Improved Current Subtracter and Its Application to Norton Amplifier (개선된 전류 감산기와 이를 이용한 노튼(Norton) 증폭기의 설계)

  • Cha, Hyeong-Woo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.82-90
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    • 2011
  • A novel class AB current subtracter(CS) and its application to Norton amplifier(NA) for low-power current-mode signal processing are designed. The CS is composed of a translinear cell, two current mirrors, and two common-emitter(CB) amplifiers. The principle of the current subtraction is that the difference of two input current applied translinear cell get from the current mirror, and then the current amplify through CB amplifier with ${\beta}$ times. The NA is consisted of the CS and wideband voltage buffer. The simulation results show that the CS has current input impedance of $20{\Omega}$, current gain of 50, and current input range of $i_{IN1}$ > $i_{IN2}{\geq}4I_B$. The NA has unit gain frequency of 312 MHz, transresistance of 130 dB, and power dissipation of 4mW at ${\pm}2.5V$ supply voltage.

An Integrated Approach of CNT Front-end Amplifier towards Spikes Monitoring for Neuro-prosthetic Diagnosis

  • Kumar, Sandeep;Kim, Byeong-Soo;Song, Hanjung
    • BioChip Journal
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    • v.12 no.4
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    • pp.332-339
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    • 2018
  • The future neuro-prosthetic devices would be required spikes data monitoring through sub-nanoscale transistors that enables to neuroscientists and clinicals for scalable, wireless and implantable applications. This research investigates the spikes monitoring through integrated CNT front-end amplifier for neuro-prosthetic diagnosis. The proposed carbon nanotube-based architecture consists of front-end amplifier (FEA), integrate fire neuron and pseudo resistor technique that observed high electrical performance through neural activity. A pseudo resistor technique ensures large input impedance for integrated FEA by compensating the input leakage current. While carbon nanotube based FEA provides low-voltage operation with directly impacts on the power consumption and also give detector size that demonstrates fidelity of the neural signals. The observed neural activity shows amplitude of spiking in terms of action potential up to $80{\mu}V$ while local field potentials up to 40 mV by using proposed architecture. This fully integrated architecture is implemented in Analog cadence virtuoso using design kit of CNT process. The fabricated chip consumes less power consumption of $2{\mu}W$ under the supply voltage of 0.7 V. The experimental and simulated results of the integrated FEA achieves $60G{\Omega}$ of input impedance and input referred noise of $8.5nv/{\sqrt{Hz}}$ over the wide bandwidth. Moreover, measured gain of the amplifier achieves 75 dB midband from range of 1 KHz to 35 KHz. The proposed research provides refreshing neural recording data through nanotube integrated circuit and which could be beneficial for the next generation neuroscientists.