• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.9
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• pp.1027-1034
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• 2014

We present the Low Power Broadband Low noise amplifier(LNA) that can be applied a whole bandwidth from 3G to 4G LTE. This multi input LNA was designed to steadily amplify through a multi input method regardless the size of the input signal and operate on a wide range of frequency band from a standard 3G CDMA band 1.2GHz to LTE band 2.5GHz. The designed LNA consumes an average of 6mA on a 1.2V power supply and this was affirmed using computer simulation tests. The amplification which was corresponded to the lowest input signal is at a maximum of 20dB and was able to obtain the minimum value of the gain of -10dB. The Noise figure is less than 3dB at a High-gain mode and is less than 15dB at a Low-gain mode.

• Journal of IKEEE
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• v.14 no.4
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• pp.257-262
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• 2010

We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.60 no.4
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• pp.262-266
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• 2011

In high data-rate communication systems, encryption/decryption must be processed in high speed. In this paper, we implement CCM security mode which is the basis of security. Specifically, we combine CCM with AES block encryption algorithm in hardware. With the combination, we can carry out encryption/decryption as well as data transmission/reception simultaneously without reducing data-rate, and we keep low-power consumption with high speed by optimizing CCM block.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.49 no.5
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• pp.233-241
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• 2000

This paper presents a systematic design procedure of $H_{\infty}$ controller of TCSC for damping low frequency inter-area oscillations in large power systems. Sensitivities of the inter-area mode for changes in line susceptance are computed using the eigen-sensitivity theory of augmented system matrix and TCSC locations are selected using the line sensitivities. The reduced model required for designing a manageable-size $H_{\infty}$ controller is obtained using the reduced frequency domain system identification method and the various weighting functions are tuned systematically to provide a robust performance. The proposed $H_{\infty}$ controller proved to be very effective for damping the inter-area mode of the large KEPCO power system.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.11
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• pp.948-952
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• 2007

In this study, a low temperature sintering multilayer piezoelectric transformer for a DC-DC converter was manufactured using $(Pb,Ca,Sr,)(Ti,Mn,Sb)O_3$ ceramics. Its electrical properties were investigated according to the variation in frequency and load resistance. The voltage step-up ratio of the multilayer piezoelectric transformer showed a maximum value at a resonant frequency of input part and increased with an increase of load resistance. The efficiency of the multilayer piezoelectric transformer showed the highest value at a load resistance of 17 $\Omega$. The output power was increased with increasing input voltage. Temperature increase of the multilayer piezoelectric transformer was increased with the increase of output power. At the load resistance of 17 $\Omega$, the multilayer piezoelectric transformer showed the temperature rises of about $20^{\circ}C$ at the output power of 18 W, and stable driving characteristics.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.521-524
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• 2009

Response to nerve stimulation platform for implementing measures to detect finger movement has been functioning as an important factor. This stimulated finger on the nerve and muscle responses would vary. In other words, the finger movement of the muscle response to nerve stimulation and sensing Actuator for the H/W development is needed. In addition, a low power embedded CPU based on the top was used. H/W configuration portion of the isolation power, constant current control, High impedance INA, amplifier parts, and the stimulus mode and the Micro-control the status of current, AD converter Low Data obtained through the processing system is implemented.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.39-43
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• 1998

A large number of soft switching topologies included a resonant circuit have been proposed. But these circuits increase number of switch in circuit and complicate sequence of switching operation. In this paper, the authors propose power conversion system, DC-AC inverter of high efficiency and high power factor with soft switching mode by partial resonant method. The switching devices in a proposed circuits are operated with soft switching by the partial resonant method, that is, PRS2MPC (Partial Resonant Soft Switching Mode Power Converter). The result is that the switching loss is very low and the efficiency of system is high. And the snubber condenser used in partial resonant circuit makes charging energy regenerated at input power source for resonant operation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.2
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• pp.95-100
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• 1998

A helical inductively coupled plasma asher, which produces low energy and high density plasma, has been built and investigated for photoresist stripping process. Oxygen ion density in the order of $10^{11}/cm^3$ is measured by Langmuir probe, and higher oxygen radical density is observed by Optical Emission Spectrometer. As RF source power is increased, the plasma density and thus photoresist stripping rate are increased. Independent RF bias power to the wafer stage provides a dc bias to the wafer and an ability to add the ion assisted reaction. At 1 KW of the source power, the coupling mechanism of the RF power to the plasma is changed from the inductive mode to the capacitive one at about 1 Torr. This change causes the plasma density and ashing rate decreases abruptly. The critical pressure of the mode change becomes larger with larger RF power.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.919-922
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• 2003

This paper presents a novel low power driving circuit for passive matrix organic lighting emitting diodes (OLED) displays. The proposed driving method for a low power OLED driving circuit which reduce large parasitic capacitance in OLED panel only use current driving method, instead of mixed mode driving method which uses voltage pre-charge technique. The driving circuit is implemented to one chip using 0.35${\mu}{\textrm}{m}$ CMOS process with 18V high voltage devices and it is applicable to 96(R.G.B)X64, 65K color OLED displays for mobile phone application. The maximum switching power dissipation of driving power dissipation is 5.7mW and it is 4% of that of the conventional driving circuit.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.59-66
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• 2015

In this paper, we propose a method of improving the light-load efficiency of DC-DC buck converter using 4bit SAR-ADC (Successive Approximation ADC) for a LDO or a power transistor size selection technique. The proposed circuit selects power transistor sizes depending on load current so that improves the light-load efficiency of the DC-DC buck converter. For this, we select the power transistor size with a cross point of the switching loss and the conduction loss. Also, when the IC operates in standby mode or sleep mode, a LDO mode is selected for improving the efficiency. The proposed circuit selects power transistor sizes(X1, X2, X4, X8) with 4 bits and its efficiency is higher about the maximum of 25% at the light-load than that of a single transistor size. Input voltage and output voltage are 5V and 3.3V for maximum load currents of 500mA.