• Title/Summary/Keyword: low phase noise

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Induction Motor Drives with Low Switching Acoustic Noise Based on the Two-Phase Modulated Random Lead-Lag PWM Scheme (2상 변조된 랜덤 Lead-Lag PWM기반의 저 스위칭 소음 유도모터 구동 시스템)

  • 위석오;정영국;임영철;양승학
    • The Transactions of the Korean Institute of Power Electronics
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    • v.8 no.2
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    • pp.151-164
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    • 2003
  • In this paper, induction motor drives with low switching acoustic noise based on the 2 phase modulated RLL(Random Lead-Lag) PWM is proposed and implemented. The proposed switching method is much bettor than 3 phase modulated RLL-PWM from the standpoint of the broadening effect of the acoustic noise spectrum. Along with the randomization of PWM Pulses, SVM(Space Vector Modulation) is executed in the TMS320C31 DSP(Digital Signal Processor). To verify the validity of the proposed RPWM(Random PWM), the experimental study was tried. The experimental results show that the performance of the proposed method and the 3 phase center-aligned SVM / conventional RLL-PWM are nearly the same from the viewpoint of the constant v/f centrel. But, in case of the proposed 2 phase modulated RLL-PWM, the spectrum characteristics of the voltage and the switching acoustic noise are shown to have better broadening effect than 3 phase modulated one.

Noise Reduction of Anti-phase Shifting to Maximum Amplitude Response in a Helmet (최대 진폭 응답으로 역위상을 천이시킨 헬멧에서의 소음감쇠 기법)

  • 조병모
    • The Journal of the Acoustical Society of Korea
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    • v.20 no.7
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    • pp.13-20
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    • 2001
  • The active noise cancellation system offers a better low frequency performance with a smaller and lighter system compared to a passive one. This paper presents an active noise control system capable of reducing the noise in a helmet after attenuating the external noise using the helmet as the passive noise reduction system, which consists of a controller for inverting and compensating the phase delay, a microphone for picking up the external noise, and a loudspeaker for radiating the acoustic anti-phase signal to reduce the external noise. In this paper, external noise can be reduced by noise controller by compensating the phase difference to be 180°in the frequency of maximun value in the amplitude response. The noise of the phase delay covered from 50°to 310°was reduced in this system and it is possible to obtain a noise reduction of up to approximately 20 dB at the ears in the enclosure.

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Characteristics of Low Frequency Aero-acoustic Noise Radiation for a Wind Turbine Generator of NREL Phase VI (NREL Phase VI 풍력발전기 저주파 소음방사 특성)

  • Mo, Jang-Oh;Kim, Byoung-Yun;Ryu, Byeng-Nam;Lee, Young-Ho
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.06a
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    • pp.504-507
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    • 2009
  • The purpose of this work is to predict the low frequency aero-acoustic noise generated from the horizontal axis wind turbine, NREL Phase VI using large eddy simulation and Ffowcs-Williams and Hawkings model provided in the commercial code, FLUENT. Calculated aerodynamic performances such as shaft torque and power are compared with experimentally measured value. Performance results show a good agreement with experimental data within about 0.8%. If the distance by two times is changed from 32D to 64D toward the downstream region, sound pressure level is reduced by about 6.4dB.

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A Study on PLL Design for Ultra Wideband (초 광대역용 PLL 설계에 관한 연구)

  • Lee, Yong-Woo;Lee, Il-Kyoo;Oh, Seung-Hyeub
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.10 no.4
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    • pp.193-198
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    • 2010
  • In this paper, we have introduced a new way to have low phase noise PLL of the Ultra wideband to meet performance requirements. Before development of the PLL, we simulated spectrum power, phase noise by using ADS. Finally, we confirm a satisfying result between required standard and measured value.

Oscillator Design and Fabrication using a Miniatured Hairpin Resonator

  • Kim, Jang-Gu;Han, Sok-Kyun;Park, Hyung-Ha
    • Journal of Navigation and Port Research
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    • v.28 no.4
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    • pp.293-297
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    • 2004
  • In this papers, an S-band oscillator of the low phase noise property using a miniaturized micro-strip hairpin shaped ring resonator is presented The substrate has a dielectric constant $\epsilon_\gamma$=3.5, a thickness h=0.508 mm, and loss tangent $tan\delta$=0.002. A designed and fabricated oscillator shows low phase noise performance of 99. 71 dBc/Hz at 100 KHz offset frequency and of output power 19.584 dBm at center frequency 2.450 GHz. This circuit was fabricated with hybrid technique, but can be fully compatible with the MMIC due to its entirely planar structure.

An InGaP/GaAs HBT Based Differential Colpitts VCO with Low Phase Noise

  • Shrestha, Bhanu;Kim, Nam-Young
    • Journal of electromagnetic engineering and science
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    • v.7 no.2
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    • pp.64-68
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    • 2007
  • An InGaP/GaAs HBT based differential Colpitts voltage control oscillator(VCO) is presented in this paper. In the VCO core, two switching transistors are introduced to steer the core bias current to save power. An LC tank with an inductor quality factor(Q) of 11.4 is used to generate oscillation frequency. It has a superior phase noise characteristics of -130.12 dBc/Hz and -105.3 at 1 MHz and 100 kHz frequency offsets respectively from the carrier frequency(1.566 GHz) when supplied with a control voltage of 0 volt. It dissipates output power of -5.3 dBm. Two pairs of on-chip base collector (BC) diodes are used in the tank circuit to increase the VCO tuning range(168 MHz). This VCO occupies the area of $1.070{\times}0.90mm^2$ including buffer and pads.

X-band CMOS VCO for 5 GHz Wireless LAN

  • kim, Insik;Ryu, Seonghan
    • International journal of advanced smart convergence
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    • v.9 no.1
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    • pp.172-176
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    • 2020
  • The implementation of a low phase noise voltage controlled oscillator (VCO) is important for the signal integrity of wireless communication terminal. A low phase noise wideband VCO for a wireless local area network (WLAN) application is presented in this paper. A 6-bit coarse tune capacitor bank (capbank) and a fine tune varactor are used in the VCO to cover the target band. The simulated oscillation frequency tuning range is from 8.6 to 11.6 GHz. The proposed VCO is desgned using 65 nm CMOS technology with a high quality (Q) factor bondwire inductor. The VCO is biased with 1.8 V VDD and shows 9.7 mA current consumption. The VCO exhibits a phase noise of -122.77 and -111.14 dBc/Hz at 1 MHz offset from 8.6 and 11.6 GHz carrier frequency, respectively. The calculated figure of merit(FOM) is -189 dBC/Hz at 1 MHz offset from 8.6 GHz carrier. The simulated results show that the proposed VCO performance satisfies the required specification of WLAN standard.

Location Error Analysis of an Active RFID-Based RTLS in Multipath and AWGN Environments

  • Myong, Seung-Il;Mo, Sang-Hyun;Yang, Hoe-Sung;Cha, Jong-Sub;Lee, Heyung-Sub;Seo, Dong-Sun
    • ETRI Journal
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    • v.33 no.4
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    • pp.528-536
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    • 2011
  • In this paper, we analyze the location accuracy of real-time locating systems (RTLSs) in multipath environments in which the RTLSs comply with the ISO/IEC 24730-2 international standard. To analyze the location error of RTLS in multipath environments, we consider a direct path and indirect path, in which time and phase are delayed, and also white Gaussian noise is added. The location error depends strongly on both the noise level and phase difference under a low signal-to-noise ratio (SNR) regime, but only on the noise level under a high SNR regime. The phase difference effect can be minimized by matching it to the time delay difference at a ratio of 180 degrees per 1 chip time delay (Tc). At a relatively high SNR of 10 dB, a location error of less than 3 m is expected at any phase and time delay value of an indirect signal. At a low SNR regime, the location error range increases to 8.1 m at a 0.5 Tc, and to 7.3 m at a 1.5 Tc. However, if the correlation energy is accumulated for an 8-bit period, the location error can be reduced to 3.9 m and 2.5 m, respectively.

A Low Noise Phase Locked Loop with Three Negative Feedback Loops (세 개의 부궤환 루프를 가진 저잡음 위상고정루프)

  • Young-Shig Choi
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.16 no.4
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    • pp.167-172
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    • 2023
  • A low-noise phase-locked loop(PLL) with three negative feedback loops has been proposed. It is not easy to improve noise characteristics with a conventional PLL. The added negative feedback loops reduce the input voltage magnitude of voltage controlled oscillator which determines the jitter characteristics, enabling the improvement of noise characteristics. Simulation results show that the jitter characteristics are improved as a negative feedback loop is added. In the case of power consumption, it slightly rises by about 10%, but jitter characteristics are improved by about two times. The proposed PLL was simulated with Hspice using a 1.8V 180nm CMOS process.

A Co-design Study of Filters and Oscillator for Low Phase Noise and High Harmonic Rejection

  • Zhang, Bing;Zhang, Wenmei;Ma, Runbo;Zhang, Xiaowei;Mao, Junfa
    • ETRI Journal
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    • v.30 no.2
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    • pp.344-346
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    • 2008
  • In this paper, we present a novel oscillator (OSC) design. Bandpass filters, which can suppress harmonics, are incorporated into a co-design with an OSC to improve the OSC phase noise and harmonic rejection. The proposed OSC/bandpass filter co-design achieves a phase noise of -130.1 dBc/Hz/600 kHz and harmonic rejection of 37.94 dB and 40.85 dB for the second and third harmonics, respectively, as compared to results achieved by the OSC before co-design of -101.6 dBc/Hz/600 kHz and 21.28 dB and 19.68 dB. Good agreement between the measured and simulated results is achieved.

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