• ETRI Journal
• /
• 제23권1호
• /
• pp.16-22
• /
• 2001

Efficient quantization methods of the line spectrum pairs (LSP) which have good performances, low complexity and memory are proposed. The adaptive quantization range method utilizing the ordering property of LSP parameters is used in a scalar quantizer and a vector-scalar hybrid quantizer. As the maximum quantization range of each LSP parameter is varied adaptively on the quantized value of the previous order's LSP parameter, efficient quantization methods can be obtained. The proposed scalar quantization algorithm needs 31 bits/frame, which is 3 bits less per frame than in the conventional scalar quantization method with interframe prediction to maintain the transparent quality of speech. The improved vector-scalar quantizer achieves an average spectral distortion of 1 dB using 26 bits/frame. The performances of proposed quantization methods are also evaluated in the transmission errors.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• 제10권11호
• /
• pp.5381-5399
• /
• 2016

Currently, the quantize-and-forward (QF) scheme with high order modulation and quantization has rather high complexity and it is thus impractical, especially in multiple relay cooperative communications. To overcome these deficiencies, an improved low complex QF scheme is proposed by the combination of the low order binary phase shift keying (BPSK) modulation and the 1-bit and 2-bit quantization, respectively. In this scheme, the relay selection is optimized by the best relay position for best bit-error-rate (BER) performance, where the relays are located closely to the destination node. In addition, an optimal power allocation is also suggested on a total power constraint. Finally, the BER and the achievable rate of the low order 1-bit, 2-bit and 3-bit QF schemes are simulated and analyzed. Simulation results indicate that the 3-bit QF scheme has about 1.8~5 dB, 4.5~7.5 dB and 1~2.5 dB performance gains than those of the decode-and-forward (DF), the 1-bit and 2-bit QF schemes, at BER of $10^{-2}$, respectively. For the 2-bit QF, the scheme of the normalized Source-Relay (S-R) distance with 0.9 has about 5dB, 7.5dB, 9dB and 15dB gains than those of the distance with 0.7, 0.5, 0.3 and 0.1, respectively, at BER of $10^{-3}$. In addition, the proposed optimal power allocation saves about 2.5dB much more relay power on an average than that of the fixed power allocation. Therefore, the proposed QF scheme can obtain excellent features, such as good BER performance, low complexity and high power efficiency, which make it much pragmatic in the future cooperative communications.

• 한국통신학회논문지
• /
• 제30권2C호
• /
• pp.41-48
• /
• 2005

본 논문에서는 H.264 표준 부호화 방식의 성능 향상 및 저 계산량을 위한 가우시안 모델 기반의 전처리 필터에 대해 제안한다. 일반적인 영상 획득 장치에서 첨가된 노이즈에 의해 훼손된 동영상은 다수의 고주파 성분으로 인하여 시각적으로 불편한 현상과 압축 효율의 저하를 초래한다. 본 논문에서는 필터링 과정에서 국부 통계적 특성과 양자화 매개변수를 이용하여, 주어진 양자화 스텝 사이즈에서 노이즈 성분을 제거하고 시각적인 효과와 비트율을 개선시켜 압축 효율을 개선하고자 한다. 또한 전처리 필터의 계산량을 줄이기 위하여 간단한 형태의 국부 통계적 특성을 재 정의하고 노이즈에 대한 매개변수를 H.264의 변환과 양자화 과정을 통하여 유추하여 적용하였다. 제안된 방식의 성능을 실험 결과로부터 확인할 수 있었다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
• /
• pp.57-60
• /
• 2004

This paper presents multibit Sigma-Delta ADC using Leslie-Singh Structure to Improve nonlinearity of feedback loop. 4-bit flash ADC for multibit Quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. Thus a Sigma-Delta ADC usually adds the dynamic element matching digital circuit within feedback loop. It occurs complexity of Sigma-Delta Circuit and increase of power dissipation. In this paper using the Leslie-Singh Structure for improving nonliearity of ADC. This structure operate at low oversampling ratio but is difficult to achieve high resolution. So in this paper propose improving loop filter for single-bit feedback multi-bit quantization Sigma-Delta ADC. It obtained 94.3dB signal to noise ratio over 615kHz bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is fabricated in 0.25um CMOS technology with 2.5V supply voltage.

• 한국정보과학회논문지:소프트웨어및응용
• /
• 제26권12호
• /
• pp.1383-1392
• /
• 1999

이미 학습된 다층퍼셉트론 신경망을 디지털 VLSI 기술을 사용하여 하드웨어로 구현할 경우 신경망의 가중치 및 뉴런 출력들을 양자화해야 하는 문제가 발생한다. 이러한 신경망 변수들의 양자화는 결과적으로 주어진 입력에 대한 신경망의 최종 출력에서의 왜곡을 초래한다. 본 논문에서는 먼저 이러한 양자화로 인한 신경망 출력에서의 왜곡을 통계적으로 분석하였다. 분석 결과에 의하면 입력패턴 각 성분의 제곱들의 합과 가중치의 크기들이 양자화 영향에 주로 기여하는 것으로 나타났다. 이러한 분석 결과를 이용하여 양자화를 위한 정밀도가 주어졌을 때, 양자화 영향이 최소화된 다층퍼셉트론 신경망을 설계하는 방법을 제시하였다. 그리고 제안된 방법에 의해 얻은 신경망과 오류역전파 학습방법에 의하여 얻은 신경망의 성능을 비교함으로써 제안된 방법의 효율성을 입증하였다. 실험결과는 낮은 양자화 정밀도에서도 제안된 방법이 더 좋은 성능을 보였다.Abstract When we implement a multilayer perceptron with the digital VLSI technology, we generally have to quantize the weights and the neuron outputs. These quantizations eventually cause distortion in the output of the network for a given input. In this paper first we made a statistical analysis about the effect caused by the quantization on the output of the network. The analysis revealed that the sum of the squared input components and the sizes of the weights are the major factors which contribute to the quantization effect. We present a design method for an MLP which minimizes the quantization effect when the precision of the quantization is given. In order to show the effectiveness of the proposed method, we developed a network by our method and compared it with the one developed by the regular backpropagation. We could confirm that the network developed by our method performs better even with a low precision of the quantization.

• 한국정보통신학회논문지
• /
• 제17권9호
• /
• pp.2029-2035
• /
• 2013

본 논문에서는 DVB-S2에 제시된 LDPC 복호기에 대하여 구현을 하기 위한 비균일 양자화 방식을 제시하였다. 고속 복호를 구현하기 위해서는 알고리즘과 구현 측면에서 여러 가지 문제점이 있다. 알고리즘 측면에서 LDPC 부호화 방식은 큰 블록 사이즈 및 많은 반복 횟수를 요구하므로 복호 속도를 높이기 위해서는 동일한 성능을 유지하면서 반복 횟수를 줄일 수 있는 알고리즘이 필요하다. 본 논문에서는 이를 위해 체크노드를 기반으로 하여 복호화 과정을 거치는 Horizontal Shuffle Scheduling 알고리즘을 적용하여 기존의 반복횟수를 줄일 수 있는 방안을 연구하였다. 구현측면에서 복호 속도를 높이기 위해서는 여러 가지 알고리즘이 제시되지만 본 논문에서는 복호기에 입력되는 양자화 비트수를 비균일 양자화 방식을 적용하여 줄임으로써 복호속도를 개선하는 방식을 제시한다. 구현 결과 복호 속도가 약 12% 개선됨을 알 수 있다.

• 전자공학회논문지B
• /
• 제32B권8호
• /
• pp.1091-1098
• /
• 1995

This paper proposes an efficient noiseless encoding method of vector quantization(VQ) index using a dynamic index mapping. Using high interblock correlation, the proposed index mapper transforms an index into a new one with lower entropy. In order to achieve good performance with low computational complexity, we adopt 'the sum of differences in pixel values on the block boundaries' as the cost function for index mapping. Simulation results show that the proposed scheme reduces the average bitrate by 40 - 50 % in ordinary VQ system for image compression. In addition, it is shown that the proposed index mapping method can be also applied to mean-residual VQ system, which allows the reduction of bitrate for VQ index by 20 - 30 %(10 - 20 % reduction in total bitrate). Since the proposed scheme is one for noiseless encoding of VQ index, it provides the same quality of the reconstructed image as the conventional VQ system.

• The Journal of the Acoustical Society of Korea
• /
• 제15권3E호
• /
• pp.13-18
• /
• 1996

A real-time identifier for the nonstationary time-varying signals and systems was implemented using a low cost DSP (digital signal processing) chip. The identifier is comprised of I/O units, a central processing unit, a control unit and its supporting software. In order t estimate the system accurately and to reduce quantization error during arithmetic operation, the firmware was programmed with 64-bit extended precision arithmetic. The performance of the identifier was verified by comparing with the simulation results. The implemented real-time identifier has negligible quantization errors and its real-time processing capability crresponds to 0.6kHz for the nonstationary AR (autoregressive) model with n=4 and m=1.

• 한국통신학회논문지
• /
• 제22권7호
• /
• pp.1515-1522
• /
• 1997

Several image coding algorithms have been developed for the telecommunication and multimedia systems with high image quality and high compression ratio. In order to achieve low entropy and distortion, the system should pay great cost of computation time and memory. In this paper, the uniform cubic lattice is chosen for Lattice Vector Quantization (LVQ) because of its generic simplicity. As a transform coding, the Discrete Wavelet Transform (DWT) is applied to the images because of its multiresolution property. The proposed algorithm is basically composed of the biorthogonal DWT and the uniform cubic LVQ. The multiresolution property of the DWT is actively used to optimize the entropy and the distortion on the basis of the distortion-rate function. The vector codebooks are also designed to be optimal at each subimage which is analyzed by the biorthogonal DWT. For compression efficiency, the vector codebook has different dimension depending on the variance of subimage. The simulation results show that the performance of the proposed coding mdthod is superior to the others in terms of the computation complexity and the PSNR in the range of entropy below 0.25 bpp.

• 대한전자공학회논문지
• /
• 제25권2호
• /
• pp.227-232
• /
• 1988

A semicustom VLSI design fo digital filters used in TDM/FDM transmultiplexer is described. A filter bank composed of only all-pass digital filter sections are implemented with the polyphase network. The use of all-pass filters as basic building blocks is shown to provide a trans-multiplexer structure that has low computational requirements, low quantization noise, and high modularity. The silicon compiler system is used to reduce the design time and to increase the credibility of designed filters. As a prototype, 1st and 2nd order all pass filter are designed, using CMOS N-well double metal technology. The chip sizes of first order filter and the second order filter are 2652 x 533\ulcorner\ulcorner 5334x4300\ulcorner\ulcorner respectively.