• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.10
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• pp.19-26
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• 1997

Novel class AB CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well CMOS process for high-frequency current-mode signal processing were developed. The CCII for low power operation consists of a class AB push-pull stage for the current input, a complementary source follower for the voltage input, and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated CCII show that the current input impedance is 875.ohm. and the bandwidth of flat gain when used as a voltage amplifier extends beyond 4MHz. The power dissipation is 1.25mW and the active chip area is 0.2*0.15[mm$\^$2/].

• ETRI Journal
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• v.38 no.4
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• pp.654-664
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• 2016

This paper presents a transformer-based reconfigurable synchronous boost converter. The lowest maximum power point tracking (MPPT)-input voltage and peak efficiency of the proposed boost converter, 20 mV and 88%, respectively, were achieved using a reconfigurable synchronous structure, static power loss minimization design, and efficiency boost mode change (EBMC) method. The proposed reconfigurable synchronous structure for high efficiency enables both a transformer-based self-startup mode (TSM) and an inductor-based MPPT mode (IMM) with a power PMOS switch instead of a diode. In addition, a static power loss minimization design, which was developed to reduce the leakage current of the native switch and quiescent current of the control blocks, enables a low input operation voltage. Furthermore, the proposed EBMC method is able to change the TSM into IMM with no additional time or energy loss. A prototype chip was implemented using a $0.18-{\mu}m$ CMOS process, and operates within an input voltage range of 9 mV to 1 V, and an output voltage range of 1 V to 3.3 V, and provides a maximum output power of 37 mW.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.717-720
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• 2000

The sensorless scheme for Switched Reluctance Motor(SRM) dives must have the robustness and reliability because the noise and error are sensitive. These elements make electrically noisy environments due to the proximity of high current power circuits with small signal electronic circuits when SRM drives. Also the leakage inductances and finite coupling capacitances these can cause the noise on any low voltage current and voltage measurement. the error can occur because the current and voltage including the noise are used as the input of sensorless algorithm In this paper the high robustness and resistance of input noise are described and the fuzzy logic based rotor estimation algorithm is used to reduce the tolerance of input data.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.853-855
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• 1993

In this paper, a further improved system obtaining very low distorted waveforms of input ac currents of three phase rectifier circuit is proposed. The proposed system consists of an uncomplicated 24 pulse diode bridge rectifier that is transformerless, by adding only switching circuit which consists of two switchs to conventional system. Also to optimum the effectiveness or the harmonic reduction, the optimum turn ratio of an autotransformer and the optimum switching control angle are decided by computer simulation. And then, the voltage waveform obtained has a total harmonic distortion of 8.1%, and the predominant harmonics 23th and 25th. This paper describes operation principle, analysis of the waveforms of input voltage and current. The theoretial results are verified through simulation.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.85-88
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• 2003

In this Paper, we report the experimental results of the Forward-flyback U-U converter with current doubler and synchronous rectifier. The experimental converter, that has a output voltage 3.3V, output current 20A, maximum power of 66W, switching frequency of 290kHz and input voltage range of 36-75V, has been successfully implemented. As a result, in the entire voltage range the measured full load efficiency was above 85$\%$, and the output voltage was regulated at 3.3V within $\pm3{\%}$ tolerance.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.8
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• pp.416-422
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• 2006

With the increasing demand for renewable energy, distributed power included in fuel cells have been studied and developed as a future energy source. For this system, a power conversion circuit is necessary to interface the generated power to the utility. In many cases, a high step-up dc/dc converter is needed to boost low input voltage to high voltage output. Conventional methods using cascade dc/dc converters cause extra complexity and higher cost. The conventional topologies to get high output voltage use flyback dc/dc converters. They have the leakage components that cause stress and loss of energy that results in low efficiency. This paper presents a high boost converter with a voltage multiplier and a coupled inductor. The secondary voltage of the coupled inductor is rectified using a voltage multiplier and series-connected with the boost voltage of primary voltage of the coupled inductor. Therefore, high boost voltage is obtained with low duty cycle. Theoretical analysis and experimental results verify the proposed solutions using a 300W prototype.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.601-605
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• 2004

A new high efficiency and low profile on-board DC/DC converter for digital car audio amplifier is proposed. The proposed converter shows the continuous input current, no DC excitation current of the transformer, the minimized electro-magnetic interference (EMI), no output inductor, and the low voltage stress of the secondary rectifier diodes. The 60W industrial sample of the proposed converter is implemented for digital car audio amplifier and the measured efficiency is $88.3\%$ at nominal input voltage.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.376-381
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• 2014

We present a CMOS rail-to-rail class-AB amplifier using dynamic current biasing to improve the delay response of the error amplifier in a low-dropout (LDO) regulator, which is a building block for a wireless power transfer receiver. The response time of conventional error amplifiers deteriorates by slewing due to parasitic capacitance generated at the pass transistor of the LDO regulator. To enhance slewing, an error amplifier with dynamic current biasing was devised. The LDO regulator with the proposed error amplifier was fabricated in a $0.35-{\mu}m$ high-voltage BCDMOS process. We obtained an output voltage of 4 V with a range of input voltages between 4.7 V and 7 V and an output current of up to 212 mA. The settling time during line transient was measured as $9{\mu}s$ for an input variation of 4.7-6 V. In addition, an output capacitor of 100 pF was realized on chip integration.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.343-346
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• 2000

This paper presents the characteristics of low consumption, high-response time hot-film type micro-flowsensors with SOI(Si-on-insulator) and trench structures. Output voltages increased due to increase of heat-loss from sensor to external. Compared with no-trench on the SOI structure, the micro-flowsensors with trench structures have properties of high output voltage and low consume power. Output voltage of micro-flowsensors with SOI and trench structures was 250 mV at $N_2$ flow rate of 2000 sccm/min, heating power of 0.3 W. The response time was about 85 msec when input flow was step-input.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.11
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• pp.1564-1570
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• 2015

This paper intends to suggest a sensing circuit of PWM voltage for a motor emulator operated in the inverter. In the emulation of the motor using a power converter, it is necessary to measure instantaneous voltage at the PWM voltage loaded from the inverter. Using a filter can generate instantaneous voltage, while it is difficult to follow the rapidly changing inverter voltage caused by the propagation delay and signal attenuation. The method of measuring the duty of PWM using FPGA can generate output voltage from the one-cycle delay of PWM, while the cost of hardware is increasing in order to acquire high precision. This paper suggests a PWM voltage sensing circuit using the analogue system that shows high precision, one-cycle delay of PWM and low-cost hardware. The PWM voltage sensing circuit works in the process of integrating input voltage for valid time by comparing levels of three-phase PWM input voltage, and produce the output value integrated at zero vector. As a result of PSIM simulation and the experiment with the produced hardware, it was verified that the suggested circuit in this paper is valid.