• 제목/요약/키워드: low complexity high speed

검색결과 117건 처리시간 0.028초

개수로형 재생펌프의 특성해석에 관한 연구 (Performance Characteristic Analysis for Open Channel Type Regenerative Pump)

  • 신동윤;최창호;김진한
    • 한국유체기계학회 논문집
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    • 제10권2호
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    • pp.46-53
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    • 2007
  • An improved performance characteristics analysis model of a regenerative pump is proposed in the present paper. For its low characteristic speed, a regenerative pump generates high head with low flow rate. However, the efficiency is fairly low due to the skin friction between impeller and casing. Also, the complexity of its internal flow pattern makes prediction of performance characteristics difficult. In the present research, a one-dimensional analysis model was improved with consideration of disc friction loss, minor loss, and modified flow length, and the result was proven to be close in range with the results from experiments.

Split LDPC Codes for Hybrid ARQ

  • Joo, Hyeong-Gun;Hong, Song-Nam;Shin, Dong-Joon
    • 한국통신학회논문지
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    • 제32권10C호
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    • pp.942-949
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    • 2007
  • In this paper, we propose a new rate-control scheme, called splining, to construct low-rate codes from high-rate codes by splitting rows of the parity-check matrices of LDPC codes, which can construct rate-compatible LDPC codes having good initial transmission performance. Good low-rate codes can be constructed by making the number of distinct check node degrees as small as possible after splitting. The proposed scheme achieves good cycle property, low decoding complexity, and fast convergence speed, especially compared to the puncturing. Especially, rate-compatible repeat accumulate-type LDPC (RA-Type LDPC) code is constructed using splitting, which covers the code rates from 1/3 to 4/5. Through simulation it is shown that this code outperforms other rate-compatible RA-Type LDPC codes for all rates and can be decoded conveniently and efficiently.

고밀도 DVD시스템을 위한 저 복잡도 검출 기법 (Low-Complexity Detection Techniques for High-Density DVD Systems)

  • 조한규;우중재;주만식;강창언;홍대식
    • 한국통신학회논문지
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    • 제27권10A호
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    • pp.1000-1010
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    • 2002
  • Partial response maximum likelihood (PRML)과 fixed-delay tree search with decision feedback (FDTS/DF)은 기록 재생 시스템에서 준최적 성능을 보이는 정보열 검출 기법 (sequence detection)으로 알려져 있다. 그러나, 정보열 검출 기법 고유의 metric 연산은 심각한 하드웨어 복잡도를 유발한다. 본 논문은 정보열 검출 기법의 복잡도 문제를 극복하기 위한 대안을 제시한다. 제안된 저 복잡도 기법들은 검출 과정에서 덧셈 및 곱셈의 수를 최소화하여 고속 프로세스 및 저 복잡도 하드웨어 구현에 적합하다. 결정 궤환 드화 깁버 (decision feedback equalization; DFE)을 결합하여 ${\tau}$=2 FDTS/DF와 동일한 성능을 보이며, 기록 밀도 S>5.6에서 PR(1111)ML의 성능을 능가함이 모의 실험을 통해 보여진다.

단일 스위치 기반의 4상한 운전 SRM 드라이브 (Four-Quadrant Operation of a Single-Switch-based Switched Reluctance Drive)

  • 하근수
    • 전기학회논문지
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    • 제59권2호
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    • pp.338-343
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    • 2010
  • Low cost motor drives are being sought for high volume energy efficient home appliances. Key to the realization of such low cost motor drives is to reduce the power electronic converter in terms of its components, particularly the active devices, finding the motor with least complexity for manufacturing and a controller that could extract the desired performance from the machine and converter combination. These and other factors such as self-starting, speed control over a wide range and most of all the crowning aspect of a four quadrant operation with bare minimum number of controllable switch (or switches) remain as formidable challenges for low cost motor drive realization. In this paper, a four quadrant switched reluctance motor (SRM) drive with only one controllable switch is realized by using a two-phase machine. The theory and operation of the proposed four-quadrant SRM drive with the proposed control algorithm for its realization are described. The motor drive is modeled, simulated and analyzed to verify its feasibility for self-starting, speed control and for four quadrant operation and the simulation results are presented. Experimental results confirm the validity of the proposed control algorithm for four quadrant control of the SRM drive. The focus of the paper is mainly directed toward the control algorithm for realizing the four-quadrant operation of the two-phase SRM drive with a single controllable switch converter.

비선형 HPA를 가진 M-QAM 시스템에서 비선형 Volterra 등화기의 수렴 속도 향상을 위한 병렬 M-band DWT-LMS 알고리즘 (Parallel M-band DWT-LMS Algorithm to Improve Convergence Speed of Nonlinear Volterra Equalizer in MQAM System with Nonlinear HPA)

  • 최윤석;박형근
    • 한국통신학회논문지
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    • 제32권7C호
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    • pp.627-634
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    • 2007
  • 고효율 변조기법 (16 QAM or 64QAM)이 비선형 고전력 증폭기 (High-Power Amplifier; HPA)를 사용하는 통신시스템에 적용되었을 때 비선형 왜곡에 의해 성능저하가 발생할 수 있다. 이런 비선형 왜곡은 수신부에서 복잡도가 낮은 LMS 알고리즘을 적용한 적응적 비선형 Volterra 등화기를 사용하여 보상할 수 있지만, 매우 느린 수렴 속도를 가지는 단점이 있다. 본 논문에서는 수렴 속도를 향상시키기 위한 병렬 M대역 이산 웨이블릿 변환영역 LMS (Parallel M-band Discrete Wavelet Transform Least Mean Square) 알고리즘을 제안한다. 모의실험을 통하여 제안된 기법이 기존의 시간 영역 LMS 알고리즘과 변환 영역 LMS 알고리즘들에 비해 수렴 속도가 우수함을 보여준다.

Synchronization for IR-UWB System Using a Switching Phase Detector-Based Impulse Phase-Locked Loop

  • Zheng, Lin;Liu, Zhenghong;Wang, Mei
    • ETRI Journal
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    • 제34권2호
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    • pp.175-183
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    • 2012
  • Conventional synchronization algorithms for impulse radio require high-speed sampling and a precise local clock. Here, a phase-locked loop (PLL) scheme is introduced to acquire and track periodical impulses. The proposed impulse PLL (iPLL) is analyzed under an ideal Gaussian noise channel and multipath environment. The timing synchronization can be recovered directly from the locked frequency and phase. To make full use of the high harmonics of the received impulses efficiently in synchronization, the switching phase detector is applied in iPLL. It is capable of obtaining higher loop gain without a rise in timing errors. In different environments, simulations verify our analysis and show about one-tenth of the root mean square errors of conventional impulse synchronizations. The developed iPLL prototype applied in a high-speed ultra-wideband transceiver shows its feasibility, low complexity, and high precision.

고속의 인터넷 라우터를 위한 IP 룩업구조 설계 (A Design of the IP Lookup Architecture for High-Speed Internet Router)

  • 서해준;안희일;조태원
    • 한국통신학회논문지
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    • 제28권7B호
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    • pp.647-659
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    • 2003
  • 고속 라우터의 인터넷 패킷 처리에서 가장 많은 시간이 걸리는 부분이 IP 패킷 주소 룩업 중 LPM 탐색이다. 기존의 CAM을 이용한 LPM 탐색에서 LPM 탐색율이 높으면서 동시에 복잡도도 높지 않은 방식은 룩업 테이블의 갱신시간이 0(n)으로 오래 걸렸다. 본 논문에서 설계한 파이프라인 룩업 테이블은 고속 LPM 탐색을 위한 구조로서 갱신시간이 0(1)으로 짧으면서도, LPM 탐색율이 높고, 복잡도도 높지 않은 새로운 방식의 파이프라인 구조로, 1bit RAM 셀을 이용한 CAM 배열 구조로 설계하였다. 룩업 테이블은 3단계의 파이프라인으로 구성된다. 단계1 및 단계2의 키 필드 분할 수 및 매칭점의 분포에 따라 파이프라인의 성능이 좌우되며, LPM 탐색율이 달라질 수 있다 설계방식은 RTL에서 하드웨어 기술 언어를 이용해서 수행되었고, 0.35$\mu\textrm{m}$ CMOS 표준 셀 라이브러리를 이용해서 게이트 수준에서 기능을 검증하였다.

Sliding Mode Control Based DTC of Sensorless Parallel-Connected Two Five-Phase PMSM Drive System

  • Kamel, Tounsi;Abdelkader, Djahbar;Said, Barkat;Al-Hitmi, M.;Iqbal, Atif
    • Journal of Electrical Engineering and Technology
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    • 제13권3호
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    • pp.1185-1201
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    • 2018
  • This paper presents a sensorless direct torque control (DTC) combined with sliding mode approach (SM) and space vector modulation (SVM) to achieve mainly a high performance and reduce torque and flux ripples of a parallel-connected two five-phase permanent magnet synchronous machine (PMSM) drive system. In order to increase the proposed drive robustness and decrease its complexity and cost, the rotor speeds, rotor positions, fluxes as well as torques are estimated by using a sliding mode observer (SMO) scheme. The effectiveness of the proposed sliding mode observer in conjunction with the sliding mode control based DTC is confirmed through the application of different load torques for wide speed range operation. Comparison between sliding mode control and proportional integral (PI) control based DTC of the proposed two-motor drive is provided. The obtained speeds, torques and fluxes responses follow their references; even in low and reverse speed operations, load torques changes, and machines parameters variations. Simulation results confirm also that, the ripples of the torques and fluxes are reduced more than 3.33% and 16.66 %, respectively, and the speed overshoots and speed drops are reduced about 99.85% and 92.24%, respectively.

승산기가 없는 구조의 FIR필터의 설계에 관한 연구 (A Study on the Design of FIR Filters with Multiplierless Structures)

  • 신재호
    • 한국통신학회논문지
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    • 제15권2호
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    • pp.166-175
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    • 1990
  • 기존 FIR 필터에는 回路가 複雜하고 高價의 乘算器가 많이 所要되기 때문에 實現에 제약을 받는다. 本 論文에서는 小型, 低價, 低電力消費, 高速 디지털필터로 實現하기에 적합하면서 乘算器를 사용하지 않는 FIR 필터 構造를 제시한다. 그 構造는 {0,{\pm}$2^n$;n=integer} 에서 두 개의 원소조합으로 표시되는 係數를 갖는 트랜스버설필터와 積分器로 구성된다. 컴퓨터 시뮬레이션에 의해 성능을 검토하였는바, 기존의 有限語長 FIR 필터의 경우와 비교하여 유사한 정도의 양호한 應答特性이 나타났다.

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Single-bit digital comparator circuit design using quantum-dot cellular automata nanotechnology

  • Vijay Kumar Sharma
    • ETRI Journal
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    • 제45권3호
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    • pp.534-542
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    • 2023
  • The large amount of secondary effects in complementary metal-oxide-semiconductor technology limits its application in the ultra-nanoscale region. Circuit designers explore a new technology for the ultra-nanoscale region, which is the quantum-dot cellular automata (QCA). Low-energy dissipation, high speed, and area efficiency are the key features of the QCA technology. This research proposes a novel, low-complexity, QCA-based one-bit digital comparator circuit for the ultra-nanoscale region. The performance of the proposed comparator circuit is presented in detail in this paper and compared with that of existing designs. The proposed QCA structure for the comparator circuit only consists of 19 QCA cells with two clock phases. QCA Designer-E and QCA Pro tools are applied to estimate the total energy dissipation. The proposed comparator saves 24.00% QCA cells, 25.00% cell area, 37.50% layout cost, and 78.11% energy dissipation compared with the best reported similar design.