• Title/Summary/Keyword: loop gain

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A Study on Bipolar DC-DC Converter for Low Voltage Direct Current Distribution (저압 직류 배전용 양극성 DC-DC 컨버터에 관한 연구)

  • Lee, Jung-Yong;Kim, Ho-Sung;Cho, Jin-Tae;Kim, Ju-Yong;Cho, Younghoon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.4
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    • pp.229-236
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    • 2019
  • This study proposes a DC-DC converter topology of solid-state transformer for low-voltage DC distribution. The proposed topology consists of a voltage balancer and bipolar DC-DC converter. The voltage and current equations are obtained on the basis of switching states to design the controller. The open-loop gain of the controller is achieved using the derived voltage and current equations. The controller gain is selected through the frequency analysis of the loop gain. The inductance and capacitance are calculated considering the voltage and current ripples. The prototype is fabricated in accordance with the designed system parameters. The proposed topology and designed controller are verified through simulation and experiment.

칼라 비데오 프린터의 Paper Feeding 제어 시스템 설계

  • 신용후
    • The Magazine of the IEIE
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    • v.18 no.6
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    • pp.39-46
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    • 1991
  • 칼라 비데오 프린터의 paper feeding 제어 시스템을 DC motor를 이용하여 설계하였다. 목표 spec을 만족하기 위한 H/W를 구성한 후 digital control 이론을 적용하여 loop gain K를 찾고 위상계와 속도계 gain을 결정하는 방법을 설명하였다. 한편 DC analysis를 통하여 앞에서 결정된 gain으로 설계할 경우 parameter variation에 의해 동작점이 벗어나는 것을 확인하고 system 구성 및 gain 등을 조정하여 동작점의 안정화를 가져올 수 있었다. 또한 DC analysis를 함으로써 부품의 공차를 설계할 수 있었다.

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Design of PID regulator for linear time invariant MIMO system with prescribed eigenstructure (지정된 고유구조를 갖는 선형 시불변 다입출력 시스템의 PID조정기의 설계)

  • 손승걸;전기준
    • 제어로봇시스템학회:학술대회논문집
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    • 1986.10a
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    • pp.86-89
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    • 1986
  • This paper presents a design methodology for a PID regulator. The parameters of the PID regulator are determined through equivalent structure to the closed-loop system whose feedback gain assigns prescribed eigenvalues of the closed-loop system and minimizes a given performance index.

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Design of Planar-Type Modified Folded Loop Antennas

  • Park, Sung-Il
    • Journal of information and communication convergence engineering
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    • v.8 no.5
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    • pp.489-492
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    • 2010
  • This paper proposes the planar-type modified monopole antennas of loop structure. This antenna has an opened center of a conventional closed loop structure with an inside-folded terminal of the loop microstrip line. The size of the proposed antenna was minimized by folding the end of the loop. Also, the reactance value has been minimized by increasing capacitances between the coupled microstrip line. Therefore the proposed antenna has been compacted to about 20% from a conventional loop antenna and has increased its efficiency. The proposed antennas have an omni-directional pattern, the antenna gain was 3.67 [dBi] and the bandwidth was 900 MHz (2.6~3.56 GHz) with VSWR$\leq$2 from the simulated and the measured results. The frequency utilization coefficient was 29.9%. These properties could satisfy the S-DMB band.

Design of Planar Modified Folded Loop Antennas for S-DMB band (위성 DMB 대역을 위한 수정된 폴디드 루프 안테나)

  • Lee, Hyeon-Jin
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.61 no.1
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    • pp.1-4
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    • 2012
  • In this paper, the planar type modified folded loop antennas for S-DMB band is proposed. The proposed antenna consisted of opened center of a conventional closed loop and folded terminal of microstrip line to inside loop antenna. The sizes proposed antenna was minimized by folding the terminal of the loop. Also, It was minimized reactance value by increasing capacitances between coupled microstrip line. Therefore the proposed antennas compacted about 20% than a conventional loop antenna and increased efficiency of antenna. The proposed antennas got an omni-directional pattern, the antenna gain was 3.67 [dBi] and the bandwidth was 900 MHz (2.6-3.56 GHz) with VSWR${\leq}$2 from the simulated and the measured results. The frequency utilization coefficient was 29.9 %. These properties could satisfy the S-DMB band.

Compact Microstrip-Fed Square Loop Antenna for DTV Applications

  • Yeo, Junho;Lee, Jong-Ig
    • Journal of information and communication convergence engineering
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    • v.14 no.4
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    • pp.222-226
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    • 2016
  • A design method for a compact square loop antenna fed by a microstrip (MS) line for indoor digital television (DTV) applications is proposed. The proposed antenna consists of a square loop, circular sectors, and an MS line. The square loop combined with circular sectors is printed on one side of a substrate, and a $75-{\Omega}$ MS line is printed on the other side. The circular sectors are used as a wideband balun or transition to connect the MS line and the square loop. A prototype of the proposed square loop antenna operating in the DTV band (470-806 MHz) is designed and fabricated on an FR4 substrate. Experimental results show that the proposed antenna has the desired impedance characteristics in the frequency band of 464-1,220 MHz (89.8%) for a voltage standing wave ratio (VSWR) of <2 covering the DTV band, and a broadside gain of 0.8-3.3 dBi in the DTV band.

A $2.1{\sim}2.5\;GHz$ variable gain LNA with a shunt feed-back (병렬 피드백을 사용하여 $2.1{\sim}2.5\;GHz$ 대역에서 이득 제어가 가능한 저잡음 증폭기의 설계)

  • Hwang, Yong-Seok;Yoo, Hyung-Joun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.7 s.361
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    • pp.54-61
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    • 2007
  • A variable gain low noise amplifier (VG-LNA) implemented in TSMC 0.18 um process is presented. This VG-LNA is designed of two stage amplifier, and its gain is controlled by the shunt feedback loop composed of a gain control transistor (GCT) and a coupling capacitor in second stage. The channel resistance of GCT in the shunt feedback loop influences the input and output stages of a second stage by the Miller effect. Total gain of the proposed VG-LNA is changed by two factors, the load impedance reduction and the interstage mismatch by controlling the channel resistance of the GCT. Consequently, by adding a shunt feedback with a gain control transistor, this proposed VG-LNA achieves both wide gain tuning range of 37 dB and continuous gain control simultaneously.

Active Control of Clamped Beams Using Acceleration Feedback Controllers (가속도 되먹임 제어기를 이용한 양단지지보의 능동제어)

  • Shin, Chang-Joo;Hong, Chin-Suk;Jeong, Weui-Bong;Jeong, Sang-Woo
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2010.10a
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    • pp.101-109
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    • 2010
  • This paper reports active control of clamped beams using acceleration feedback controllers (AF). The equations of motion of clamped beam under force and moment pairs were derived and the equations of AF controllers were formulated. The effect of the parameters - gain and damping ratio - of the AF controllers on the open loop transfer function was investigated mainly in terms of the system stability. Increasing the gain of the AF controller tuned at a mode, the magnitude of the open loop transfer function is increased at all frequencies. The increase of the damping ratio of the AF controller leads to decrease the magnitude of the open loop transfer function and modifies its phase characteristics to be more stable. Three AF controllers connected in parallel were then proposed. Each AF controller is tuned at the $2^{nd}$, $3^{rd}$ and $4^{th}$ modes, respectively. Their parameters were determined to remain the system to be stable based on the results of the parametric study. A significant reduction in vibration at the 3 modes can be obtained.

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Design of a Robust Fine Seek Controller Using a Genetic Algorithm (유전자 알고리듬을 이용한 강인 미동 탐색 제어기의 설계)

  • Lee, Moonnoh;Jin, Kyoung Bog
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.25 no.5
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    • pp.361-368
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    • 2015
  • This paper deals with a robust fine seek controller design problem with multiple constraints using a genetic algorithm. A robust $H\infty$ constraint is introduced to attenuate effectively velocity disturbance caused by the eccentric rotation of the disk. A weighting function is optimally selected based on the estimation of velocity disturbance and the estimated minimum velocity loop gain. A robust velocity loop constraint is considered to minimize the variances of the velocity loop gain and bandwidth against the uncertainties of fine actuator. Finally, a robust fine seek controller is obtained by solving a genetic algorithm with an LMI condition and an appropriate objective function. The proposed controller design method is applied to the fine seek control system of a DVD recording device and is evaluated through the experimental results.

High Speed Grid Voltage Detection Method for 3 Phase Grid-Connected Inverter during Grid Faults (전원사고 시 3상 계통연계 인버터의 전원 전압 고속 검출 방법)

  • Choi, Hyeong-Jin;Song, Seung-Ho;Jeong, Seung-Gi;Choi, Ju-Yeop;Choy, Ick
    • Journal of the Korean Solar Energy Society
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    • v.29 no.5
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    • pp.65-72
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    • 2009
  • The new method is proposed to improve high speed detection of grid voltage phase and magnitude during a voltage dip due to a grid faults. Usually, A LPF(Low Pass Filter) is used in the feedback loop of PLL (Phase Locked Loop) system because the measured grid voltage contains harmonic distortions and sensor noises. so, a new design method of the loop gain of the PI -type controller in the PLL system is proposed with the consideration of the dynamics of the LPF. As a result, a better transient response can be obtained with the proposed design method. The LPF frequency and PI controller gain are designed in coordination according to the steady state and dynamic performance requirement. This paper shows the feasibility and the usefulness of the proposed methods through the computer simulation and the lab-scale experiments.